Re: [PATCH v3 1/6] dt-bindings: mux-j7200-wiz: Add lane function defines
From: Nishanth Menon
Date: Thu Sep 17 2020 - 08:46:37 EST
On 15:47-20200917, Kishon Vijay Abraham I wrote:
> > Thanks, good point. I am not sure if WIZ should even be used.. It is
> > a TI internal prefix for various serdes solutions, but I agree that
> > SERDES0 is too generic a terminology. That said, we should cleanup
> > include/dt-bindings/mux/mux-j721e-wiz.h as well, prior to introducing
> > j7200 changes.
> WIZ is defined in public TRM (https://www.ti.com/lit/pdf/spruiu1).
Maybe give the TRM team a feedback to use a little more human readable
naming? if I just ctrl+f "wiz" in the 10,000 page trm the first match
is: "CA bits can be swizzled between any bit positions via the
DDRSS_PHY_1053[23-0] PHY_ADR_ADDR_SEL_0 field" (it is not even in the
table of contents?)
However, if I search for serdes, and then go down to page 7773, "WIZ:
The WIZ acts as a wrapper for the SerDes, and can both send control
signals to and report status signals from the SerDes, and muxes SerDes
just call it ti-k3-serdes-mux (since there are other TI serdes muxes..)?
You dont want to be on the brunt of something like  caused by, your's
Also this is never going to scale with the number of devices we are
spinning out.. one header per SoC? makes no sense to me.
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