[PATCH 0/4] perf/amd/uncore: Support user core/thread and slice specification

From: Kim Phillips
Date: Mon Sep 21 2020 - 10:43:52 EST


Add support for AMD's uncore L3 PMUs to count events by core/thread
and/or by L3 slice.

The first patch rewrites most of the initial F17h support to enhance
readability and to prepare for the new upcoming attributes.

The second patch adds support for F17h's threadmask and slicemask.

The third patch adds support for F19h's threadmask, coreid, sliceid,
enallcores, and enallslices. F19h hardware can only count one core
or slice, or all of them at one time.

The last patch makes the driver's dmesg output more useful.

Cc: Alexander Shishkin <alexander.shishkin@xxxxxxxxxxxxxxx>
Cc: Arnaldo Carvalho de Melo <acme@xxxxxxxxxx>
Cc: Borislav Petkov <bp@xxxxxxxxx>
Cc: "H. Peter Anvin" <hpa@xxxxxxxxx>
Cc: Ingo Molnar <mingo@xxxxxxxxxx>
Cc: Jiri Olsa <jolsa@xxxxxxxxxx>
Cc: Mark Rutland <mark.rutland@xxxxxxx>
Cc: Michael Petlan <mpetlan@xxxxxxxxxx>
Cc: Namhyung Kim <namhyung@xxxxxxxxxx>
Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
Cc: Stephane Eranian <eranian@xxxxxxxxxx>
Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
Cc: x86@xxxxxxxxxx
Cc: linux-kernel@xxxxxxxxxxxxxxx

Kim Phillips (4):
perf/amd/uncore: Prepare to scale for more attributes that vary per
family
perf/amd/uncore: Allow F17h user threadmask and slicemask
specification
perf/amd/uncore: Allow F19h user coreid, threadmask, and sliceid
specification
perf/amd/uncore: Inform the user how many counters each uncore PMU has

arch/x86/events/amd/uncore.c | 174 ++++++++++++++++++++++-------------
1 file changed, 111 insertions(+), 63 deletions(-)

--
2.27.0