Re: [PATCH v4 09/10] clk: qcom: dispcc: Update DP clk ops for phy design
From: Stephen Boyd
Date: Tue Sep 22 2020 - 14:51:48 EST
Quoting Stephen Boyd (2020-09-16 16:12:01)
> The clk_rcg2_dp_determine_rate() function is used for the DP pixel clk.
> This function should return the rate that can be achieved by the pixel
> clk in 'struct clk_rate_request::rate' and match the logic similar to
> what is seen in clk_rcg2_dp_set_rate(). But that isn't the case. Instead
> the code merely bubbles the rate request up to the parent of the pixel
> clk and doesn't try to do a rational approximation of the rate that
> would be achieved by picking some m/n value for the RCG.
>
> Let's change this logic so that we can assume the parent clk frequency
> is fixed (it is because it's the VCO of the DP PLL that is configured
> based on the link rate) and so that we can calculate what the m/n value
> will be and adjust the req->rate appropriately.
>
> Cc: Jeykumar Sankaran <jsanka@xxxxxxxxxxxxxx>
> Cc: Chandan Uddaraju <chandanu@xxxxxxxxxxxxxx>
> Cc: Vara Reddy <varar@xxxxxxxxxxxxxx>
> Cc: Tanmay Shah <tanmay@xxxxxxxxxxxxxx>
> Cc: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
> Cc: Manu Gautam <mgautam@xxxxxxxxxxxxxx>
> Cc: Sandeep Maheswaram <sanm@xxxxxxxxxxxxxx>
> Cc: Douglas Anderson <dianders@xxxxxxxxxxxx>
> Cc: Sean Paul <seanpaul@xxxxxxxxxxxx>
> Cc: Stephen Boyd <sboyd@xxxxxxxxxx>
> Cc: Jonathan Marek <jonathan@xxxxxxxx>
> Cc: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
> Cc: Rob Clark <robdclark@xxxxxxxxxxxx>
> Signed-off-by: Stephen Boyd <swboyd@xxxxxxxxxxxx>
> ---
Applied to clk-next