Re: [PATCH 1/3] clk: keystone: sci-clk: fix parsing assigned-clock data during probe
From: Stephen Boyd
Date: Tue Sep 22 2020 - 15:59:18 EST
Quoting Tero Kristo (2020-09-07 01:57:38)
> The DT clock probe loop incorrectly terminates after processing "clocks"
> only, fix this by re-starting the loop when all entries for current
> DT property have been parsed.
>
> Fixes: 8e48b33f9def ("clk: keystone: sci-clk: probe clocks from DT instead of firmware")
> Reported-by: Peter Ujfalusi <peter.ujfalusi@xxxxxx>
> Signed-off-by: Tero Kristo <t-kristo@xxxxxx>
> ---
Applied to clk-next