Re: [PATCH] MIPS: remove the obsolete RM7000 extended interrupts handler

[Thomas Bogendoerfer]

On Thu, Oct 01, 2020 at 12:10:57AM +0100, Maciej W. Rozycki wrote:
> On Wed, 30 Sep 2020, Thomas Bogendoerfer wrote:
> 
> > > > not yet;-) I have an RM7000 based system in my basement... I'm also
> > > > not sure, if R7k O2s need that.
> > > 
> > >  One of the more exotic Malta daughtercards used that too I believe.  I'd 
> > > have to check the docs.  Of course getting hands on such a daughtercard is 
> > > another matter, but we continue having RM7000 enabled for the Malta.
> > 
> > I've checked interrupts on P6064 and doesn't use the "extented" interrupts.
> > And since O2 uses the same CPU connector for all CPU boards I doubt it
> > it either.
> 
>  Mind that interrupts can be asserted in the RM7k via an external write 
> request too, and I'm fairly sure SGI hardware would use that rather than 
> interrupt inputs given that R4000/R4400 SC/MC CPUs only have Int*(0) wired 
> and all the remaining interrupts are only available via a processor write.  
> Have you checked that?

checked now, IP32 uses a single interrupt pin coming from CRIME ASIC,
so nothing "fanncy" there and no use for the extended RM7k interrupts.

> > What about Malta ? 
> 
>  So this is the CoreBonito64 daughtercard, which can have either an RM5261 
> or an RM7061 processor installed.  The Int*(9:6) inputs are not mentioned, 
> which I take it means unconnected, and ExtRqst* has a pull-up and is 
> otherwise wired to a debug connector only.  Which makes me conclude this 
> feature cannot be used in a standard application with this card.
> 
>  NB there is another interrupt controller embedded in the Bonito64 system 
> controller, which on the CoreBonito64, conversely, can actually be enabled 
> with a jumper and used, but it's not usually either.

ok, thanks for the info.

Thomas.

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