Re: [PATCH v2 3/4] ARM: dts: exynos: Add Ethernet to Artik 5 board

From: Krzysztof Kozlowski
Date: Sat Oct 03 2020 - 06:14:10 EST


On Fri, 2 Oct 2020 at 21:22, Łukasz Stelmach <l.stelmach@xxxxxxxxxxx> wrote:
>
> Add node for ax88796c ethernet chip.
>
> Signed-off-by: Łukasz Stelmach <l.stelmach@xxxxxxxxxxx>
> ---
> arch/arm/boot/dts/exynos3250-artik5-eval.dts | 21 ++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos3250-artik5-eval.dts b/arch/arm/boot/dts/exynos3250-artik5-eval.dts
> index 20446a846a98..7f115c348a2a 100644
> --- a/arch/arm/boot/dts/exynos3250-artik5-eval.dts
> +++ b/arch/arm/boot/dts/exynos3250-artik5-eval.dts
> @@ -37,3 +37,24 @@ &mshc_2 {
> &serial_2 {
> status = "okay";
> };
> +
> +&spi_0 {
> + status = "okay";
> + cs-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>, <0>;
> +
> + assigned-clocks = <&cmu CLK_MOUT_MPLL>, <&cmu CLK_DIV_MPLL_PRE>, <&cmu CLK_MOUT_SPI0>, <&cmu CLK_DIV_SPI0>, <&cmu CLK_DIV_SPI0_PRE>, <&cmu CLK_SCLK_SPI0>;

No spaces before or after '='.

> + assigned-clock-parents = <&cmu CLK_FOUT_MPLL>, <&cmu CLK_MOUT_MPLL>, <&cmu CLK_DIV_MPLL_PRE>, <&cmu CLK_MOUT_SPI0>, <&cmu CLK_DIV_SPI0>, <&cmu CLK_DIV_SPI0_PRE>;

This line is still too long. Please wrap it at 80. Checkpatch should
complain about it... so it seems you did not run it. Please fix all
checkpatch issues.

> +
> + ax88796c@0 {
> + compatible = "asix,ax88796c";
> + local-mac-address = [00 00 00 00 00 00]; /* Filled in by a boot-loader */
> + interrupt-parent = <&gpx2>;
> + interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
> + spi-max-frequency = <40000000>;
> + reg = <0x0>;

Put reg after compatible.

Best regards,
Krzysztof