Re: [PATCH v3 11/18] dmaengine: idxd: ims setup for the vdcm
From: Raj, Ashok
Date: Fri Oct 09 2020 - 09:02:12 EST
On Fri, Oct 09, 2020 at 09:49:45AM -0300, Jason Gunthorpe wrote:
> On Fri, Oct 09, 2020 at 05:43:07AM -0700, Raj, Ashok wrote:
> > On Fri, Oct 09, 2020 at 08:57:37AM -0300, Jason Gunthorpe wrote:
> > > On Thu, Oct 08, 2020 at 06:22:31PM -0700, Raj, Ashok wrote:
> > >
> > > > Not randomly put there Jason :-).. There is a good reason for it.
> > >
> > > Sure the PASID value being associated with the IRQ make sense, but
> > > combining that register with the interrupt mask is just a compltely
> > > random thing to do.
> >
> > Hummm... Not sure what you are complaining.. but in any case giving
> > hardware a more efficient way to store interrupt entries breaking any
> > boundaries that maybe implied by the spec is why IMS was defined.
>
> I'm saying this PASID stuff is just some HW detail of IDXD and nothing
> that the core irqchip code should concern itself with
Ok, so you are saying this is device specific why is generic framework
having to worry about the PASID stuff?
I thought we are consolidating code that otherwise similar drivers would
require anyway. I thought that's what Thomas was accomplishing with the new
framework.
He is the architect in chief for this... having PASID in the framework
seems like everybody could benefit instead of just being idxd specific.
This isn't the only game in town.