[PATCH v4] ASoC: dt-bindings: stm32: convert sai to json-schema
From: Olivier Moysan
Date: Fri Oct 09 2020 - 10:12:34 EST
Convert the STM32 SAI bindings to DT schema format using json-schema.
Signed-off-by: Olivier Moysan <olivier.moysan@xxxxxx>
---
Changes in v2:
- use pattern for compatible of child nodes
- rework dmas and clocks properties
- add "additionalProperties"
Changes in v3:
- move clocks properties for st,stm32h7-sai compatible, to 'else' clause
Changes in v4:
- fix dtbs_check errors
---
.../bindings/sound/st,stm32-sai.txt | 107 ----------
.../bindings/sound/st,stm32-sai.yaml | 200 ++++++++++++++++++
2 files changed, 200 insertions(+), 107 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/sound/st,stm32-sai.txt
create mode 100644 Documentation/devicetree/bindings/sound/st,stm32-sai.yaml
diff --git a/Documentation/devicetree/bindings/sound/st,stm32-sai.txt b/Documentation/devicetree/bindings/sound/st,stm32-sai.txt
deleted file mode 100644
index c42b91e525fa..000000000000
--- a/Documentation/devicetree/bindings/sound/st,stm32-sai.txt
+++ /dev/null
@@ -1,107 +0,0 @@
-STMicroelectronics STM32 Serial Audio Interface (SAI).
-
-The SAI interface (Serial Audio Interface) offers a wide set of audio protocols
-as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97.
-The SAI contains two independent audio sub-blocks. Each sub-block has
-its own clock generator and I/O lines controller.
-
-Required properties:
- - compatible: Should be "st,stm32f4-sai" or "st,stm32h7-sai"
- - reg: Base address and size of SAI common register set.
- - clocks: Must contain phandle and clock specifier pairs for each entry
- in clock-names.
- - clock-names: Must contain "pclk" "x8k" and "x11k"
- "pclk": Clock which feeds the peripheral bus interface.
- Mandatory for "st,stm32h7-sai" compatible.
- Not used for "st,stm32f4-sai" compatible.
- "x8k": SAI parent clock for sampling rates multiple of 8kHz.
- "x11k": SAI parent clock for sampling rates multiple of 11.025kHz.
- - interrupts: cpu DAI interrupt line shared by SAI sub-blocks
-
-Optional properties:
- - resets: Reference to a reset controller asserting the SAI
-
-SAI subnodes:
-Two subnodes corresponding to SAI sub-block instances A et B can be defined.
-Subnode can be omitted for unsused sub-block.
-
-SAI subnodes required properties:
- - compatible: Should be "st,stm32-sai-sub-a" or "st,stm32-sai-sub-b"
- for SAI sub-block A or B respectively.
- - reg: Base address and size of SAI sub-block register set.
- - clocks: Must contain one phandle and clock specifier pair
- for sai_ck which feeds the internal clock generator.
- If the SAI shares a master clock, with another SAI set as MCLK
- clock provider, SAI provider phandle must be specified here.
- - clock-names: Must contain "sai_ck".
- Must also contain "MCLK", if SAI shares a master clock,
- with a SAI set as MCLK clock provider.
- - dmas: see Documentation/devicetree/bindings/dma/st,stm32-dma.yaml
- - dma-names: identifier string for each DMA request line
- "tx": if sai sub-block is configured as playback DAI
- "rx": if sai sub-block is configured as capture DAI
- - pinctrl-names: should contain only value "default"
- - pinctrl-0: see Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml
-
-SAI subnodes Optional properties:
- - st,sync: specify synchronization mode.
- By default SAI sub-block is in asynchronous mode.
- This property sets SAI sub-block as slave of another SAI sub-block.
- Must contain the phandle and index of the sai sub-block providing
- the synchronization.
- - st,iec60958: support S/PDIF IEC6958 protocol for playback
- IEC60958 protocol is not available for capture.
- By default, custom protocol is assumed, meaning that protocol is
- configured according to protocol defined in related DAI link node,
- such as i2s, left justified, right justified, dsp and pdm protocols.
- Note: ac97 protocol is not supported by SAI driver
- - #clock-cells: should be 0. This property must be present if the SAI device
- is a master clock provider, according to clocks bindings, described in
- Documentation/devicetree/bindings/clock/clock-bindings.txt.
-
-The device node should contain one 'port' child node with one child 'endpoint'
-node, according to the bindings defined in Documentation/devicetree/bindings/
-graph.txt.
-
-Example:
-sound_card {
- compatible = "audio-graph-card";
- dais = <&sai1b_port>;
-};
-
-sai1: sai1@40015800 {
- compatible = "st,stm32h7-sai";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x40015800 0x400>;
- reg = <0x40015800 0x4>;
- clocks = <&rcc SAI1_CK>, <&rcc PLL1_Q>, <&rcc PLL2_P>;
- clock-names = "pclk", "x8k", "x11k";
- interrupts = <87>;
-
- sai1a: audio-controller@40015804 {
- compatible = "st,stm32-sai-sub-a";
- reg = <0x4 0x1C>;
- clocks = <&rcc SAI1_CK>;
- clock-names = "sai_ck";
- dmas = <&dmamux1 1 87 0x400 0x0>;
- dma-names = "tx";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sai1a>;
-
- sai1b_port: port {
- cpu_endpoint: endpoint {
- remote-endpoint = <&codec_endpoint>;
- format = "i2s";
- };
- };
- };
-};
-
-audio-codec {
- codec_port: port {
- codec_endpoint: endpoint {
- remote-endpoint = <&cpu_endpoint>;
- };
- };
-};
diff --git a/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml b/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml
new file mode 100644
index 000000000000..6ad48c7681c1
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml
@@ -0,0 +1,200 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/st,stm32-sai.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics STM32 Serial Audio Interface (SAI)
+
+maintainers:
+ - Olivier Moysan <olivier.moysan@xxxxxx>
+
+description:
+ The SAI interface (Serial Audio Interface) offers a wide set of audio
+ protocols as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97.
+ The SAI contains two independent audio sub-blocks. Each sub-block has
+ its own clock generator and I/O lines controller.
+
+properties:
+ compatible:
+ enum:
+ - st,stm32f4-sai
+ - st,stm32h7-sai
+
+ reg:
+ items:
+ - description: Base address and size of SAI common register set.
+ - description: Base address and size of SAI identification register set.
+ minItems: 1
+ maxItems: 2
+
+ ranges:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ clocks:
+ maxItems: 3
+
+ clock-names:
+ maxItems: 3
+
+required:
+ - compatible
+ - reg
+ - ranges
+ - "#address-cells"
+ - "#size-cells"
+ - clocks
+ - clock-names
+
+patternProperties:
+ "^audio-controller@[0-9a-f]+$":
+ type: object
+ description:
+ Two subnodes corresponding to SAI sub-block instances A et B
+ can be defined. Subnode can be omitted for unsused sub-block.
+
+ properties:
+ compatible:
+ description: Compatible for SAI sub-block A or B.
+ pattern: "st,stm32-sai-sub-[ab]"
+
+ "#sound-dai-cells":
+ const: 0
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: sai_ck clock feeding the internal clock generator.
+ - description: MCLK clock from a SAI set as master clock provider.
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: sai_ck
+ - const: MCLK
+ minItems: 1
+ maxItems: 2
+
+ dmas:
+ maxItems: 1
+
+ dma-names:
+ description: |
+ rx: SAI sub-block is configured as a capture DAI.
+ tx: SAI sub-block is configured as a playback DAI.
+ enum: [ rx, tx ]
+
+ st,sync:
+ description:
+ Configure the SAI sub-block as slave of another SAI sub-block.
+ By default SAI sub-block is in asynchronous mode.
+ Must contain the phandle and index of the SAI sub-block providing
+ the synchronization.
+ allOf:
+ - $ref: /schemas/types.yaml#definitions/phandle-array
+ - maxItems: 1
+
+ st,iec60958:
+ description:
+ If set, support S/PDIF IEC6958 protocol for playback.
+ IEC60958 protocol is not available for capture.
+ By default, custom protocol is assumed, meaning that protocol is
+ configured according to protocol defined in related DAI link node,
+ such as i2s, left justified, right justified, dsp and pdm protocols.
+ allOf:
+ - $ref: /schemas/types.yaml#definitions/flag
+
+ "#clock-cells":
+ description: Configure the SAI device as master clock provider.
+ const: 0
+
+ required:
+ - compatible
+ - "#sound-dai-cells"
+ - reg
+ - clocks
+ - clock-names
+ - dmas
+ - dma-names
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: st,stm32f4-sai
+
+ - then:
+ properties:
+ clocks:
+ items:
+ - description: x8k, SAI parent clock for sampling rates multiple of 8kHz.
+ - description: x11k, SAI parent clock for sampling rates multiple of 11.025kHz.
+
+ clock-names:
+ items:
+ - const: x8k
+ - const: x11k
+
+ - else:
+ properties:
+ clocks:
+ items:
+ - description: pclk feeds the peripheral bus interface.
+ - description: x8k, SAI parent clock for sampling rates multiple of 8kHz.
+ - description: x11k, SAI parent clock for sampling rates multiple of 11.025kHz.
+
+ clock-names:
+ items:
+ - const: pclk
+ - const: x8k
+ - const: x11k
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/stm32mp1-clks.h>
+ #include <dt-bindings/reset/stm32mp1-resets.h>
+ sai2: sai@4400b000 {
+ compatible = "st,stm32h7-sai";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x4400b000 0x400>;
+ reg = <0x4400b000 0x4>, <0x4400b3f0 0x10>;
+ clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
+ clock-names = "pclk", "x8k", "x11k";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
+ pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>;
+ status = "okay";
+
+ sai2a: audio-controller@4400b004 {
+ #sound-dai-cells = <0>;
+ compatible = "st,stm32-sai-sub-a";
+ reg = <0x4 0x1c>;
+ dmas = <&dmamux1 89 0x400 0x01>;
+ dma-names = "tx";
+ clocks = <&rcc SAI2_K>;
+ clock-names = "sai_ck";
+ status = "okay";
+ };
+ };
+
+...
--
2.17.1