Re: [PATCH 1/2] clk: qoriq: modify MAX_PLL_DIV to 32
From: Stephen Boyd
Date: Tue Oct 13 2020 - 22:48:16 EST
Quoting Qiang Zhao (2020-09-15 20:03:10)
> From: Zhao Qiang <qiang.zhao@xxxxxxx>
>
> On LS2088A, Watchdog need clk divided by 32,
> so modify MAX_PLL_DIV to 32
>
> Signed-off-by: Zhao Qiang <qiang.zhao@xxxxxxx>
> ---
Applied to clk-next