Re: [PATCH 1/3] usb: dwc3: ulpi: Use VStsDone to detect PHY regs access completion

[Felipe Balbi]

Hi,

Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> writes:

> In accordance with [1] the DWC_usb3 core sets the GUSB2PHYACCn.VStsDone
> bit when the PHY vendor control access is done and clears it when the
> application initiates a new transaction. The doc doesn't say anything
> about the GUSB2PHYACCn.VStsBsy flag serving for the same purpose. Moreover
> we've discovered that the VStsBsy flag can be cleared before the VStsDone
> bit. So using the former as a signal of the PHY control registers
> completion might be dangerous. Let's have the VStsDone flag utilized
> instead then.
>
> [1] Synopsys DesignWare Cores SuperSpeed USB 3.0 xHCI Host Controller
>     Databook, 2.70a, December 2013, p.388
>
> Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx>
> ---
>  drivers/usb/dwc3/core.h | 1 +
>  drivers/usb/dwc3/ulpi.c | 2 +-
>  2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
> index 2f04b3e42bf1..8d5e5bba1bc2 100644
> --- a/drivers/usb/dwc3/core.h
> +++ b/drivers/usb/dwc3/core.h
> @@ -284,6 +284,7 @@
>  
>  /* Global USB2 PHY Vendor Control Register */
>  #define DWC3_GUSB2PHYACC_NEWREGREQ	BIT(25)
> +#define DWC3_GUSB2PHYACC_DONE		BIT(24)
>  #define DWC3_GUSB2PHYACC_BUSY		BIT(23)
>  #define DWC3_GUSB2PHYACC_WRITE		BIT(22)
>  #define DWC3_GUSB2PHYACC_ADDR(n)	(n << 16)
> diff --git a/drivers/usb/dwc3/ulpi.c b/drivers/usb/dwc3/ulpi.c
> index e6e6176386a4..20f5d9aba317 100644
> --- a/drivers/usb/dwc3/ulpi.c
> +++ b/drivers/usb/dwc3/ulpi.c
> @@ -24,7 +24,7 @@ static int dwc3_ulpi_busyloop(struct dwc3 *dwc)
>  
>  	while (count--) {
>  		reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0));
> -		if (!(reg & DWC3_GUSB2PHYACC_BUSY))
> +		if (reg & DWC3_GUSB2PHYACC_DONE)

are you sure this works in all supported versions of the core?

John, could you confirm this for us?

thanks

-- 
balbi

Attachment: signature.asc
Description: PGP signature