Re: [PATCH 1/3] powerpc/uaccess: Switch __put_user_size_allowed() to __put_user_asm_goto()

From: Andreas Schwab
Date: Tue Oct 27 2020 - 21:39:45 EST


On Okt 28 2020, Andreas Schwab wrote:

> On Sep 04 2020, Christophe Leroy wrote:
>
>> __put_user_asm_goto() provides more flexibility to GCC and avoids using
>> a local variable to tell if the write succeeded or not.
>> GCC can then avoid implementing a cmp in the fast path.
>
> That breaks CLONE_CHILD_SETTID. I'm getting an assertion failure in
> __libc_fork (THREAD_GETMEM (self, tid) != ppid).

This is what schedule_tail now looks like. As you can see, put_user has
become a nop:

000000000000455c <.schedule_tail>:
455c: 7c 08 02 a6 mflr r0
4560: f8 01 00 10 std r0,16(r1)
4564: f8 21 ff 91 stdu r1,-112(r1)
4568: 4b ff cd 4d bl 12b4 <.finish_task_switch>
456c: 4b ff c0 99 bl 604 <.balance_callback>
4570: e8 6d 01 88 ld r3,392(r13)
4574: e9 23 06 b0 ld r9,1712(r3)
4578: 2f a9 00 00 cmpdi cr7,r9,0
457c: 41 9e 00 14 beq cr7,4590 <.schedule_tail+0x34>
4580: 38 80 00 00 li r4,0
4584: 38 a0 00 00 li r5,0
4588: 48 00 00 01 bl 4588 <.schedule_tail+0x2c>
4588: R_PPC64_REL24 .__task_pid_nr_ns
458c: 60 00 00 00 nop
4590: 48 00 00 01 bl 4590 <.schedule_tail+0x34>
4590: R_PPC64_REL24 .calculate_sigpending
4594: 60 00 00 00 nop
4598: 38 21 00 70 addi r1,r1,112
459c: e8 01 00 10 ld r0,16(r1)
45a0: 7c 08 03 a6 mtlr r0
45a4: 4e 80 00 20 blr

This is schedule_tail in 5.9:

000000000000455c <.schedule_tail>:
455c: 7c 08 02 a6 mflr r0
4560: fb c1 ff f0 std r30,-16(r1)
4564: fb e1 ff f8 std r31,-8(r1)
4568: f8 01 00 10 std r0,16(r1)
456c: f8 21 ff 81 stdu r1,-128(r1)
4570: 4b ff cd 45 bl 12b4 <.finish_task_switch>
4574: 4b ff c0 91 bl 604 <.balance_callback>
4578: eb cd 01 88 ld r30,392(r13)
457c: eb fe 06 b0 ld r31,1712(r30)
4580: 2f bf 00 00 cmpdi cr7,r31,0
4584: 41 9e 00 2c beq cr7,45b0 <.schedule_tail+0x54>
4588: 7f c3 f3 78 mr r3,r30
458c: 38 80 00 00 li r4,0
4590: 38 a0 00 00 li r5,0
4594: 48 00 00 01 bl 4594 <.schedule_tail+0x38>
4594: R_PPC64_REL24 .__task_pid_nr_ns
4598: 60 00 00 00 nop
459c: e9 3e 0a b8 ld r9,2744(r30)
45a0: 7f bf 48 40 cmpld cr7,r31,r9
45a4: 41 9d 00 0c bgt cr7,45b0 <.schedule_tail+0x54>
45a8: 2b a9 00 03 cmpldi cr7,r9,3
45ac: 41 9d 00 14 bgt cr7,45c0 <.schedule_tail+0x64>
45b0: 48 00 00 01 bl 45b0 <.schedule_tail+0x54>
45b0: R_PPC64_REL24 .calculate_sigpending
45b4: 60 00 00 00 nop
45b8: 38 21 00 80 addi r1,r1,128
45bc: 48 00 00 00 b 45bc <.schedule_tail+0x60>
45bc: R_PPC64_REL24 _restgpr0_30
45c0: 39 20 00 00 li r9,0
45c4: 90 7f 00 00 stw r3,0(r31)
45c8: 4b ff ff e8 b 45b0 <.schedule_tail+0x54>


Andreas.

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Andreas Schwab, schwab@xxxxxxxxxxxxxx
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