RE: [PATCH] KVM: x86: emulate wait-for-SIPI and SIPI-VMExit

[Qi, Yadong]

> -----Original Message-----
> From: Paolo Bonzini <pbonzini@xxxxxxxxxx>
> Sent: Tuesday, September 22, 2020 5:10 PM
> To: Qi, Yadong <yadong.qi@xxxxxxxxx>; kvm@xxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx; x86@xxxxxxxxxx
> Cc: Christopherson, Sean J <sean.j.christopherson@xxxxxxxxx>;
> vkuznets@xxxxxxxxxx; wanpengli@xxxxxxxxxxx; jmattson@xxxxxxxxxx;
> joro@xxxxxxxxxx; tglx@xxxxxxxxxxxxx; mingo@xxxxxxxxxx; bp@xxxxxxxxx;
> hpa@xxxxxxxxx; liran.alon@xxxxxxxxxx; nikita.leshchenko@xxxxxxxxxx; Gao,
> Chao <chao.gao@xxxxxxxxx>; Tian, Kevin <kevin.tian@xxxxxxxxx>; Chen, Luhai
> <luhai.chen@xxxxxxxxx>; Zhu, Bing <bing.zhu@xxxxxxxxx>; Wang, Kai Z
> <kai.z.wang@xxxxxxxxx>
> Subject: Re: [PATCH] KVM: x86: emulate wait-for-SIPI and SIPI-VMExit
> 
> On 22/09/20 07:23, yadong.qi@xxxxxxxxx wrote:
> > From: Yadong Qi <yadong.qi@xxxxxxxxx>
> >
> > Background: We have a lightweight HV, it needs INIT-VMExit and
> > SIPI-VMExit to wake-up APs for guests since it do not monitor the
> > Local APIC. But currently virtual wait-for-SIPI(WFS) state is not
> > supported in nVMX, so when running on top of KVM, the L1 HV cannot
> > receive the INIT-VMExit and SIPI-VMExit which cause the L2 guest
> > cannot wake up the APs.
> >
> > According to Intel SDM Chapter 25.2 Other Causes of VM Exits, SIPIs
> > cause VM exits when a logical processor is in wait-for-SIPI state.
> >
> > In this patch:
> >     1. introduce SIPI exit reason,
> >     2. introduce wait-for-SIPI state for nVMX,
> >     3. advertise wait-for-SIPI support to guest.
> >
> > When L1 hypervisor is not monitoring Local APIC, L0 need to emulate
> > INIT-VMExit and SIPI-VMExit to L1 to emulate INIT-SIPI-SIPI for L2. L2
> > LAPIC write would be traped by L0 Hypervisor(KVM), L0 should emulate
> > the INIT/SIPI vmexit to L1 hypervisor to set proper state for L2's
> > vcpu state.
> >
> > Handle procdure:
> > Source vCPU:
> >     L2 write LAPIC.ICR(INIT).
> >     L0 trap LAPIC.ICR write(INIT): inject a latched INIT event to target
> >        vCPU.
> > Target vCPU:
> >     L0 emulate an INIT VMExit to L1 if is guest mode.
> >     L1 set guest VMCS, guest_activity_state=WAIT_SIPI, vmresume.
> >     L0 set vcpu.mp_state to INIT_RECEIVED if (vmcs12.guest_activity_state
> >        == WAIT_SIPI).
> >
> > Source vCPU:
> >     L2 write LAPIC.ICR(SIPI).
> >     L0 trap LAPIC.ICR write(INIT): inject a latched SIPI event to traget
> >        vCPU.
> > Target vCPU:
> >     L0 emulate an SIPI VMExit to L1 if (vcpu.mp_state == INIT_RECEIVED).
> >     L1 set CS:IP, guest_activity_state=ACTIVE, vmresume.
> >     L0 resume to L2.
> >     L2 start-up.
> 
> Again, this looks good but it needs testcases.
> 

Hi, Paolo

I saw you queued the testcase patch: https://patchwork.kernel.org/project/kvm/patch/20201013052845.249113-1-yadong.qi@xxxxxxxxx/
Will you also queue this patch? Or there are some additional comments of this patch? 

Best Regard
Yadong