Re: [PATCH AUTOSEL 5.9 02/35] arm64: dts: meson-axg: add USB nodes

[Neil Armstrong]

On 03/11/2020 02:18, Sasha Levin wrote:
> From: Neil Armstrong <narmstrong@xxxxxxxxxxxx>
> 
> [ Upstream commit 1b208bab34dc3f4ef8f408105017d4a7b72b2a2f ]
> 
> This adds the USB Glue node, with the USB2 & USB3 controllers along the single
> USB2 PHY node.
> 
> Signed-off-by: Neil Armstrong <narmstrong@xxxxxxxxxxxx>
> Reviewed-by: Kevin Hilman <khilman@xxxxxxxxxxxx>
> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>
> Signed-off-by: Kevin Hilman <khilman@xxxxxxxxxxxx>
> Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
> ---
>  arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 50 ++++++++++++++++++++++
>  1 file changed, 50 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> index b9efc8469265d..fae48efae83e9 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> @@ -171,6 +171,46 @@ soc {
>  		#size-cells = <2>;
>  		ranges;
>  
> +		usb: usb@ffe09080 {
> +			compatible = "amlogic,meson-axg-usb-ctrl";
> +			reg = <0x0 0xffe09080 0x0 0x20>;
> +			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +			ranges;
> +
> +			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
> +			clock-names = "usb_ctrl", "ddr";
> +			resets = <&reset RESET_USB_OTG>;
> +
> +			dr_mode = "otg";
> +
> +			phys = <&usb2_phy1>;
> +			phy-names = "usb2-phy1";
> +
> +			dwc2: usb@ff400000 {
> +				compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
> +				reg = <0x0 0xff400000 0x0 0x40000>;
> +				interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clkc CLKID_USB1>;
> +				clock-names = "otg";
> +				phys = <&usb2_phy1>;
> +				dr_mode = "peripheral";
> +				g-rx-fifo-size = <192>;
> +				g-np-tx-fifo-size = <128>;
> +				g-tx-fifo-size = <128 128 16 16 16>;
> +			};
> +
> +			dwc3: usb@ff500000 {
> +				compatible = "snps,dwc3";
> +				reg = <0x0 0xff500000 0x0 0x100000>;
> +				interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> +				dr_mode = "host";
> +				maximum-speed = "high-speed";
> +				snps,dis_u2_susphy_quirk;
> +			};
> +		};
> +
>  		ethmac: ethernet@ff3f0000 {
>  			compatible = "amlogic,meson-axg-dwmac",
>  				     "snps,dwmac-3.70a",
> @@ -1734,6 +1774,16 @@ sd_emmc_c: mmc@7000 {
>  				clock-names = "core", "clkin0", "clkin1";
>  				resets = <&reset RESET_SD_EMMC_C>;
>  			};
> +
> +			usb2_phy1: phy@9020 {
> +				compatible = "amlogic,meson-gxl-usb2-phy";
> +				#phy-cells = <0>;
> +				reg = <0x0 0x9020 0x0 0x20>;
> +				clocks = <&clkc CLKID_USB>;
> +				clock-names = "phy";
> +				resets = <&reset RESET_USB_OTG>;
> +				reset-names = "phy";
> +			};
>  		};
>  
>  		sram: sram@fffc0000 {
> 

Hi Sasha,

This needs also support in the dwc3-meson-g12a driver, you can drop it from backport.

Neil