Re: [PATCH] RISC-V: Use non-PGD mappings for early DTB access

[Atish Patra]

On Tue, Nov 3, 2020 at 10:37 PM Anup Patel <anup.patel@xxxxxxx> wrote:
>
> Currently, we use PGD mappings for early DTB mapping in early_pgd
> but this breaks Linux kernel on SiFive Unleashed because on SiFive
> Unleashed PMP checks don't work correctly for PGD mappings.
>

Not sure why this is an issue with Unleashed only. Microchip Polarfire
SoC seems to work fine with early DTB pa as 0x88000000.
However, unleashed fails to boot if the DTB is loaded any address
below 0xC0000000 and it is mapped via PGD.

> To fix early DTB mappings on SiFive Unleashed, we use non-PGD
> mappings (i.e. PMD) for early DTB access.
>
> Fixes: 8f3a2b4a96dc ("RISC-V: Move DT mapping outof fixmap")
> Signed-off-by: Anup Patel <anup.patel@xxxxxxx>
> ---
>  arch/riscv/mm/init.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>
> diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
> index ea933b789a88..0d13d0c36a7d 100644
> --- a/arch/riscv/mm/init.c
> +++ b/arch/riscv/mm/init.c
> @@ -297,6 +297,7 @@ pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
>  #define NUM_EARLY_PMDS         (1UL + MAX_EARLY_MAPPING_SIZE / PGDIR_SIZE)
>  #endif
>  pmd_t early_pmd[PTRS_PER_PMD * NUM_EARLY_PMDS] __initdata __aligned(PAGE_SIZE);
> +pmd_t early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
>
>  static pmd_t *__init get_pmd_virt_early(phys_addr_t pa)
>  {
> @@ -494,6 +495,18 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa)
>                                    load_pa + (va - PAGE_OFFSET),
>                                    map_size, PAGE_KERNEL_EXEC);
>
> +#ifndef __PAGETABLE_PMD_FOLDED
> +       /* Setup early PMD for DTB */
> +       create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
> +                          (uintptr_t)early_dtb_pmd, PGDIR_SIZE, PAGE_TABLE);
> +       /* Create two consecutive PMD mappings for FDT early scan */
> +       pa = dtb_pa & ~(PMD_SIZE - 1);
> +       create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA,
> +                          pa, PMD_SIZE, PAGE_KERNEL);
> +       create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE,
> +                          pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL);
> +       dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1));
> +#else
>         /* Create two consecutive PGD mappings for FDT early scan */
>         pa = dtb_pa & ~(PGDIR_SIZE - 1);
>         create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
> @@ -501,6 +514,7 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa)
>         create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA + PGDIR_SIZE,
>                            pa + PGDIR_SIZE, PGDIR_SIZE, PAGE_KERNEL);
>         dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PGDIR_SIZE - 1));
> +#endif
>         dtb_early_pa = dtb_pa;
>
>         /*
> --
> 2.25.1
>
>
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FWIW: Tested on Unleashed & Polarfire SoC.
Tested-by: Atish Patra <atish.patra@xxxxxxx>
Reviewed-by: Atish Patra <atish.patra@xxxxxxx>

@palmer: Can you consider this patch in next rcX PR ?

-- 
Regards,
Atish