Re: [PATCH -next] irq-chip/gic-v3-its: Fixed an issue where the ITS executes the residual commands in the queue again when the ITS wakes up from sleep mode.
From: Marc Zyngier
Date: Thu Nov 05 2020 - 09:25:05 EST
On 2020-11-05 14:06, xuqiang (M) wrote:
在 2020/11/5 21:12, Marc Zyngier 写道:
Please don't top-post.
On 2020-11-05 11:54, xuqiang (M) wrote:
The kernel sends three commands in the following sequence:
1.mapd(deviceA, ITT_addr1, valid:1)
2.mapti(deviceA):ITS write ITT_addr1 memory;
3.mapd(deviceA, ITT_addr1, valid:0) and kfree(ITT_addr1);
4.mapd(deviceA, ITT_addr2, valid:1);
5.mapti(deviceA):ITS write ITT_addr2 memory;
In this case, the processor enters the sleep mode. After the kernel
performs the suspend operation, the firmware performs the store
operation and saves GITS_CBASER and GITS_CWRITER registers.
Then, the processor is woken up, and the firmware restores
GITS_CBASER
and GITS_CWRITER registers. Because GITS_CWRITER register is not 0,
ITS will read the above command sequence execution from the command
queue, causing ITT_addr1 memory to be trampled.
This cannot work. By doing a memset on the command queue, you are
only feeding crap to the ITS (command 0 simply does not exist).
Consider yourself lucky that it doesn't just lock-up.
What needs to happen is the restore sequence that is already in the
driver, so that the command queue is in a sane state before
re-enabling
the ITS.
M.
On my platform, ITS_FLAGS_SAVE_SUSPEND_STATE is not set, thus
the first if condition in its_save_disable under list_for_each_entry
goes
to the continue, however, I want to set the GITS_CWRITER to 0 at the
end of list_for_each_entry.
Do you have any suggestions about how to do this?
That's pretty much dropping the checks for ITS_FLAGS_SAVE_SUSPEND_STATE,
isn't it? But I assume your ITS is already enabled by the time you
reenter
the kernel? If so, I bet your firmware is doing more than just writing
to CBASER and CWRITER...
M.
--
Jazz is not dead. It just smells funny...