RE: [PATCH v3 3/3] clk: sifive: Add a driver for the SiFive FU740 PRCI IP block

[Pragnesh Patel]

>-----Original Message-----
>From: Zong Li <zong.li@xxxxxxxxxx>
>Sent: 11 November 2020 15:05
>To: Paul Walmsley ( Sifive) <paul.walmsley@xxxxxxxxxx>; palmer@xxxxxxxxxxx;
>sboyd@xxxxxxxxxx; schwab@xxxxxxxxxxxxxx; Pragnesh Patel
><pragnesh.patel@xxxxxxxxxxxx>; aou@xxxxxxxxxxxxxxxxx;
>mturquette@xxxxxxxxxxxx; Yash Shah <yash.shah@xxxxxxxxxxxx>; linux-
>kernel@xxxxxxxxxxxxxxx; linux-clk@xxxxxxxxxxxxxxx; linux-
>riscv@xxxxxxxxxxxxxxxxxxx
>Cc: Zong Li <zong.li@xxxxxxxxxx>; Henry Styles ( Sifive) <hes@xxxxxxxxxx>; Erik
>Danie <erik.danie@xxxxxxxxxx>
>Subject: [PATCH v3 3/3] clk: sifive: Add a driver for the SiFive FU740 PRCI IP
>block
>
>Add driver code for the SiFive FU740 PRCI IP block. This IP block handles reset
>and clock control for the SiFive FU740 device and implements SoC-level clock
>tree controls and dividers.
>
>This driver contains bug fixes and contributions from Henry Styles
><hes@xxxxxxxxxx> Erik Danie <erik.danie@xxxxxxxxxx> Pragnesh Patel
><pragnesh.patel@xxxxxxxxxxxx>
>
>Signed-off-by: Zong Li <zong.li@xxxxxxxxxx>
>Cc: Henry Styles <hes@xxxxxxxxxx>
>Cc: Erik Danie <erik.danie@xxxxxxxxxx>
>Cc: Pragnesh Patel <pragnesh.patel@xxxxxxxxxxxx>
>---
> drivers/clk/sifive/Kconfig                    |   4 +-
> drivers/clk/sifive/Makefile                   |   1 +
> drivers/clk/sifive/fu740-prci.c               | 122 ++++++++++++++++++
> drivers/clk/sifive/fu740-prci.h               |  21 +++
> drivers/clk/sifive/sifive-prci.c              | 120 +++++++++++++++++
> drivers/clk/sifive/sifive-prci.h              |  88 +++++++++++++
> include/dt-bindings/clock/sifive-fu740-prci.h |  23 ++++
> 7 files changed, 377 insertions(+), 2 deletions(-)  create mode 100644

Reviewed-by: Pragnesh Patel <Pragnesh.patel@xxxxxxxxxx>