Re: [PATCH 0/7] MIPS: ralink: add CPU clock detection and clock gate driver for MT7621
From: Chuanhong Guo
Date: Thu Nov 12 2020 - 00:32:45 EST
On Thu, Nov 12, 2020 at 9:26 AM Chuanhong Guo <gch981213@xxxxxxxxx> wrote:
>
> I've already said in previous threads that clock assignment in
> current linux kernel is not trustworthy.
> I've got the clock plan for mt7621 now. (Can't share it, sorry.)
> Most of your clock assumptions above are incorrect.
> I've made a clock driver with gate support a few months ago.[0]
> but I don't have much time to really finish it.
> Maybe you could rework your clock gate driver based on it.
>
> [0] https://github.com/981213/linux/commit/2eca1f045e4c3db18c941135464c0d7422ad8133
hsdma/eth/pio clocks are still missing in mediatek doc and
I just made them up in the driver. Correct clock frequency for
them aren't really important for them to work though.
And another part I didn't finish is checking clock support for
every drivers mt7621 used. Many drivers don't explicitly
enable the clock and may be problematic when kernel
gates unused clocks.
--
Regards,
Chuanhong Guo