Re: Error: invalid switch -me200

[Michael Ellerman]

Christophe Leroy <christophe.leroy@xxxxxxxxxx> writes:
> Le 14/11/2020 à 01:20, Segher Boessenkool a écrit :
>> On Fri, Nov 13, 2020 at 12:14:18PM -0800, Nick Desaulniers wrote:
>>>>>> Error: invalid switch -me200
>>>>>> Error: unrecognized option -me200
>>>>>
>>>>> 251 cpu-as-$(CONFIG_E200)   += -Wa,-me200
>>>>>
>>>>> Are those all broken configs, or is Kconfig messed up such that
>>>>> randconfig can select these when it should not?
>>>>
>>>> Hmmm, looks like this flag does not exist in mainline binutils? There is
>>>> a thread in 2010 about this that Segher commented on:
>>>>
>>>> https://lore.kernel.org/linuxppc-dev/9859E645-954D-4D07-8003-FFCD2391AB6E@xxxxxxxxxxxxxxxxxxx/
>>>>
>>>> Guess this config should be eliminated?
>> 
>> The help text for this config options says that e200 is used in 55xx,
>> and there *is* an -me5500 GAS flag (which probably does this same
>> thing, too).  But is any of this tested, or useful, or wanted?
>> 
>> Maybe Christophe knows, cc:ed.
>> 
>
> I don't have much clue on this.

Me either.

> But I see on wikipedia that e5500 is a 64 bits powerpc (https://en.wikipedia.org/wiki/PowerPC_e5500)
>
> What I see is that NXP seems to provide a GCC version that includes aditionnal cpu (e200z0 e200z2 
> e200z3 e200z4 e200z6 e200z7):
>
> valid arguments to '-mcpu=' are: 401 403 405 405fp 440 440fp 464 464fp 476 476fp 505 601 602 603 
> 603e 604 604e 620 630 740 7400 7450 750 801 821 823 8540 8548 860 970 G3 G4 G5 a2 cell e200z0 e200z2 
> e200z3 e200z4 e200z6 e200z7 e300c2 e300c3 e500mc e500mc64 e5500 e6500 ec603e native power3 power4 
> power5 power5+ power6 power6x power7 power8 powerpc powerpc64 powerpc64le rs64 titan "
>
> https://community.nxp.com/t5/MPC5xxx/GCC-generating-not-implemented-instructions/m-p/845049
>
> Apparently based on binutils 2.28
>
> https://www.nxp.com/docs/en/release-note/S32DS-POWER-v1-2-RN.pdf
>
> But that's not exactly -me200 though.
>
> Now, I can't see any defconfig that selects CONFIG_E200, so is that worth keeping it in the kernel 
> at all ?

There was a commit in 2014 that suggests it worked at least to some
extent then:

  3477e71d5319 ("powerpc/booke: Restrict SPE exception handlers to e200/e500 cores")


Presumably there was a non-upstream toolchain where it was supported?

AFAICS the kernel builds OK with just the cpu-as modification removed:

diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index a4d56f0a41d9..16b8336f91dd 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -248,7 +248,6 @@ KBUILD_CFLAGS               += $(call cc-option,-mno-string)
 cpu-as-$(CONFIG_40x)           += -Wa,-m405
 cpu-as-$(CONFIG_44x)           += -Wa,-m440
 cpu-as-$(CONFIG_ALTIVEC)       += $(call as-option,-Wa$(comma)-maltivec)
-cpu-as-$(CONFIG_E200)          += -Wa,-me200
 cpu-as-$(CONFIG_E500)          += -Wa,-me500

 # When using '-many -mpower4' gas will first try and find a matching power4


So that seems like the obvious fix for now.

I tried booting the resulting kernel in qemu, but I get:

  $ qemu-system-ppc -M none -cpu e200 -kernel build\~/vmlinux
  Error: Trying to register SPR 574 (23e) twice !


Which is not related AFAIK and indicates the qemu support is broken.

Unless we hear from someone that they're using mainline on an e200 then
it seems like it's a candidate for removal.

cheers