Re: [PATCH v4 11/15] dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields

[Eugeniy Paltsev]

Hi Sia,

> Subject: [PATCH v4 11/15] dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields
> 
> Add support for Intel KeemBay DMA registers. These registers are required
> to run data transfer between device to memory and memory to device on Intel
> KeemBay SoC.
> 
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
> Signed-off-by: Sia Jee Heng <jee.heng.sia@xxxxxxxxx>
> ---
>  drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c |  4 ++++
>  drivers/dma/dw-axi-dmac/dw-axi-dmac.h          | 14 ++++++++++++++
>  2 files changed, 18 insertions(+)
> 
> diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> index 7c97b58206bf..9f7f908b89d8 100644
> --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
> @@ -1192,6 +1192,10 @@ static int dw_probe(struct platform_device *pdev)
>         if (IS_ERR(chip->regs))
>                 return PTR_ERR(chip->regs);
> 
> +       chip->apb_regs = devm_platform_ioremap_resource(pdev, 1);
> +       if (IS_ERR(chip->apb_regs))
> +               dev_warn(&pdev->dev, "apb_regs not supported\n");

There shouldn't be warning in case of compatible = "snps,axi-dma-1.01a" and
apb_regs missing. Could you please try to do ioremap for this region only in
case of intel,kmb-axi-dma?

> +
>         chip->core_clk = devm_clk_get(chip->dev, "core-clk");
>         if (IS_ERR(chip->core_clk))
>                 return PTR_ERR(chip->core_clk);
> diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
> index bdb66d775125..f64e8d33b127 100644
> --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
> +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h
> @@ -63,6 +63,7 @@ struct axi_dma_chip {
>         struct device           *dev;
>         int                     irq;
>         void __iomem            *regs;
> +       void __iomem            *apb_regs;
>         struct clk              *core_clk;
>         struct clk              *cfgr_clk;
>         struct dw_axi_dma       *dw;
> @@ -169,6 +170,19 @@ static inline struct axi_dma_chan *dchan_to_axi_dma_chan(struct dma_chan *dchan)
>  #define CH_INTSIGNAL_ENA       0x090 /* R/W Chan Interrupt Signal Enable */
>  #define CH_INTCLEAR            0x098 /* W Chan Interrupt Clear */
> 
> +/* Apb slave registers */
Could you please add the comment that all this registers exist only in case of
intel,kmb-axi-dma extension?

> +#define DMAC_APB_CFG           0x000 /* DMAC Apb Configuration Register */
> +#define DMAC_APB_STAT          0x004 /* DMAC Apb Status Register */
> +#define DMAC_APB_DEBUG_STAT_0  0x008 /* DMAC Apb Debug Status Register 0 */
> +#define DMAC_APB_DEBUG_STAT_1  0x00C /* DMAC Apb Debug Status Register 1 */
> +#define DMAC_APB_HW_HS_SEL_0   0x010 /* DMAC Apb HW HS register 0 */
> +#define DMAC_APB_HW_HS_SEL_1   0x014 /* DMAC Apb HW HS register 1 */
> +#define DMAC_APB_LPI           0x018 /* DMAC Apb Low Power Interface Reg */
> +#define DMAC_APB_BYTE_WR_CH_EN 0x01C /* DMAC Apb Byte Write Enable */
> +#define DMAC_APB_HALFWORD_WR_CH_EN     0x020 /* DMAC Halfword write enables */
> +
> +#define UNUSED_CHANNEL         0x3F /* Set unused DMA channel to 0x3F */
> +#define MAX_BLOCK_SIZE         0x1000 /* 1024 blocks * 4 bytes data width */
> 
>  /* DMAC_CFG */
>  #define DMAC_EN_POS                    0
> --
> 2.18.0
>