Re: [PATCH v2 1/4] dt-bindings: phy: Add sparx5-serdes bindings

[Steen Hegelund]

On 19.11.2020 11:28, Vinod Koul wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On 10-11-20, 15:49, Steen Hegelund wrote:
> > Document the Sparx5 ethernet serdes phy driver bindings.
>
> Rob ..?
>
> Also pls cc devicetree@xxxxxxxxxxxxxxx
>
> > Signed-off-by: Lars Povlsen <lars.povlsen@xxxxxxxxxxxxx>
> > Signed-off-by: Steen Hegelund <steen.hegelund@xxxxxxxxxxxxx>
> > ---
> >  .../bindings/phy/microchip,sparx5-serdes.yaml | 283 ++++++++++++++++++
> >  1 file changed, 283 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/phy/microchip,sparx5-serdes.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/phy/microchip,sparx5-serdes.yaml b/Documentation/devicetree/bindings/phy/microchip,sparx5-serdes.yaml
> > new file mode 100644
> > index 000000000000..a3a5b68f0a43
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/microchip,sparx5-serdes.yaml
> > @@ -0,0 +1,283 @@
> > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Microchip Sparx5 Serdes controller
> > +
> > +maintainers:
> > +  - Steen Hegelund <steen.hegelund@xxxxxxxxxxxxx>
> > +
> > +description: |
> > +  The Sparx5 SERDES interfaces share the same basic functionality, but
> > +  support different operating modes and line rates.
> > +
> > +  The following list lists the SERDES features:
> > +
> > +  * RX Adaptive Decision Feedback Equalizer (DFE)
> > +  * Programmable continuous time linear equalizer (CTLE)
> > +  * Rx variable gain control
> > +  * Rx built-in fault detector (loss-of-lock/loss-of-signal)
> > +  * Adjustable tx de-emphasis (FFE)
> > +  * Tx output amplitude control
> > +  * Supports rx eye monitor
> > +  * Multiple loopback modes
> > +  * Prbs generator and checker
> > +  * Polarity inversion control
> > +
> > +  SERDES6G:
> > +
> > +  The SERDES6G is a high-speed SERDES interface, which can operate at
> > +  the following data rates:
> > +
> > +  * 100 Mbps (100BASE-FX)
> > +  * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
> > +  * 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
> > +  * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
> > +
> > +  SERDES10G
> > +
> > +  The SERDES10G is a high-speed SERDES interface, which can operate at
> > +  the following data rates:
> > +
> > +  * 100 Mbps (100BASE-FX)
> > +  * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
> > +  * 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
> > +  * 5 Gbps (QSGMII/USGMII)
> > +  * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
> > +  * 10 Gbps (10G-USGMII)
> > +  * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
> > +
> > +  SERDES25G
> > +
> > +  The SERDES25G is a high-speed SERDES interface, which can operate at
> > +  the following data rates:
> > +
> > +  * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
> > +  * 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
> > +  * 5 Gbps (QSGMII/USGMII)
> > +  * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
> > +  * 10 Gbps (10G-USGMII)
> > +  * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
> > +  * 25.78125 Gbps (25GBASE-KR/25GBASE-CR/25GBASE-SR/25GBASE-LR/25GBASE-ER)
> > +
> > +properties:
> > +  $nodename:
> > +    pattern: "^serdes@[0-9a-f]+$"
> > +
> > +  compatible:
> > +    const: microchip,sparx5-serdes.yaml
> > +
> > +  reg:
> > +    description: Address and length of the register set for the device
> > +
> > +  '#phy-cells':
> > +    const: 1
> > +    description: |
> > +      - The main serdes input port
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - '#phy-cells'
>
> reg-names missing here

I will add them.


> > +    };
> > +
> > +...
> > --
> > 2.29.2
>
> --
> ~Vinod

BR
Steen

---------------------------------------
Steen Hegelund
steen.hegelund@xxxxxxxxxxxxx