Re: [PATCH] MIPS: KASLR: Fix sync_icache() trapped in loop when synci_step is zero

[Maciej W. Rozycki]

On Thu, 3 Dec 2020, Jinyang He wrote:

> Thus, only one synci operation is required when synci_step is 0
> on Loongson64 platform. I guess that some other platforms have
> similar implementations on synci, so add judgment conditions in
> `while` to ensure that at least all platforms perform synci
> operations once. For those platforms that do not need synci,
> they just do one more operation similar to nop.

 This is non-compliant and looks to me like a risky choice for what was 
invented to guarantee portability across all MIPS systems.  Compliant 
software will fail with Loongson64 processors unless patched like this 
piece, and you don't really have control over all user software out there 
(I would expect issues with JIT engines and the like).

 If only a single SYNCI operation is ever required why wasn't SYNCI_Step 
set to some large value instead that would in reality prevent looping over 
SYNCI from happening?

  Maciej