Re: [PATCH v3 4/5] dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel combo PHY support for i.MX8qxp
From: Guido Günther
Date: Sun Dec 13 2020 - 11:46:03 EST
Hi,
On Fri, Dec 11, 2020 at 09:46:21AM +0800, Liu Ying wrote:
> Add support for Mixel MIPI DPHY + LVDS PHY combo IP
> as found on Freescale i.MX8qxp SoC.
>
> Cc: Guido Günther <agx@xxxxxxxxxxx>
> Cc: Kishon Vijay Abraham I <kishon@xxxxxx>
> Cc: Vinod Koul <vkoul@xxxxxxxxxx>
> Cc: Rob Herring <robh+dt@xxxxxxxxxx>
> Cc: NXP Linux Team <linux-imx@xxxxxxx>
> Signed-off-by: Liu Ying <victor.liu@xxxxxxx>
> ---
> v2->v3:
> * No change.
>
> v1->v2:
> * Add the binding for i.MX8qxp Mixel combo PHY based on the converted binding.
> (Guido)
>
> .../bindings/phy/mixel,mipi-dsi-phy.yaml | 41 ++++++++++++++++++++--
> 1 file changed, 38 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml b/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml
> index c34f2e6..786cfd7 100644
> --- a/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml
> @@ -14,10 +14,14 @@ description: |
> MIPI-DSI IP from Northwest Logic). It represents the physical layer for the
> electrical signals for DSI.
>
> + The Mixel PHY IP block found on i.MX8qxp is a combo PHY that can work
> + in either MIPI-DSI PHY mode or LVDS PHY mode.
> +
> properties:
> compatible:
> enum:
> - fsl,imx8mq-mipi-dphy
> + - fsl,imx8qxp-mipi-dphy
>
> reg:
> maxItems: 1
> @@ -40,6 +44,11 @@ properties:
> "#phy-cells":
> const: 0
>
> + fsl,syscon:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: |
> + A phandle which points to Control and Status Registers(CSR) module.
> +
> power-domains:
> maxItems: 1
>
> @@ -48,12 +57,38 @@ required:
> - reg
> - clocks
> - clock-names
> - - assigned-clocks
> - - assigned-clock-parents
> - - assigned-clock-rates
> - "#phy-cells"
> - power-domains
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: fsl,imx8mq-mipi-dphy
> + then:
> + properties:
> + fsl,syscon: false
> +
> + required:
> + - assigned-clocks
> + - assigned-clock-parents
> + - assigned-clock-rates
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: fsl,imx8qxp-mipi-dphy
> + then:
> + properties:
> + assigned-clocks: false
> + assigned-clock-parents: false
> + assigned-clock-rates: false
> +
> + required:
> + - fsl,syscon
> +
> additionalProperties: false
>
> examples:
Reviewed-by: Guido Günther <agx@xxxxxxxxxxx>
Cheers,
-- Guido
> --
> 2.7.4
>