[PATCH 14/18] arm64: dts: renesas: beacon: Correct I2C bus speeds
From: Adam Ford
Date: Sun Dec 13 2020 - 13:44:22 EST
For greater compatibility with upcoming kits that will reuse the baseboard
and SOM-level files, adjust the I2C speeds to make it the most compatible
with all devices.
Signed-off-by: Adam Ford <aford173@xxxxxxxxx>
---
arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi | 2 +-
arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
index 200236b6e0ef..7f499282f851 100644
--- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
@@ -343,7 +343,7 @@ &hsusb {
&i2c2 {
status = "okay";
- clock-frequency = <100000>;
+ clock-frequency = <400000>;
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
index b093a34b0fa0..b5ba45261c0b 100644
--- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
@@ -110,7 +110,7 @@ &hscif2 {
&i2c4 {
status = "okay";
- clock-frequency = <400000>;
+ clock-frequency = <100000>;
pca9654: gpio@20 {
compatible = "onnn,pca9654";
--
2.25.1