Re: [PATCH 1/2] hwrng: iproc-rng200: Fix disable of the block.

From: Scott Branden
Date: Mon Dec 14 2020 - 12:55:17 EST




On 2020-12-14 8:04 a.m., matthias.bgg@xxxxxxxxxx wrote:
> From: Matthias Brugger <mbrugger@xxxxxxxx>
>
> When trying to disable the block we bitwise or the control
> register with value zero. This will leave the block always turned on.
> Fix this by setting the corresponding bit to zero.
>
> Fixes: c83d45d5685f ("hwrng: iproc-rng200 - Add Broadcom IPROC RNG driver")
Commit message needs to be re-written.
I don't think this is an actual fix as the ~RNG_CTL_RNG_RBGEN_MASK already zeros the bit.  This is just a code change, which is fine because it makes things clearer
> Signed-off-by: Matthias Brugger <mbrugger@xxxxxxxx>
> ---
>
> drivers/char/hw_random/iproc-rng200.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/char/hw_random/iproc-rng200.c b/drivers/char/hw_random/iproc-rng200.c
> index 01583faf9893..e106ce3c0146 100644
> --- a/drivers/char/hw_random/iproc-rng200.c
> +++ b/drivers/char/hw_random/iproc-rng200.c
> @@ -28,7 +28,6 @@
> #define RNG_CTRL_OFFSET 0x00
> #define RNG_CTRL_RNG_RBGEN_MASK 0x00001FFF
> #define RNG_CTRL_RNG_RBGEN_ENABLE 0x00000001
> -#define RNG_CTRL_RNG_RBGEN_DISABLE 0x00000000
>
> #define RNG_SOFT_RESET_OFFSET 0x04
> #define RNG_SOFT_RESET 0x00000001
> @@ -61,7 +60,7 @@ static void iproc_rng200_restart(void __iomem *rng_base)
> /* Disable RBG */
> val = ioread32(rng_base + RNG_CTRL_OFFSET);
> val &= ~RNG_CTRL_RNG_RBGEN_MASK;
This mask will already zero the enable bit.
> - val |= RNG_CTRL_RNG_RBGEN_DISABLE;
> + val &= ~RNG_CTRL_RNG_RBGEN_ENABLE;
> iowrite32(val, rng_base + RNG_CTRL_OFFSET);
>
> /* Clear all interrupt status */
> @@ -174,7 +173,7 @@ static void iproc_rng200_cleanup(struct hwrng *rng)
> /* Disable RNG hardware */
> val = ioread32(priv->base + RNG_CTRL_OFFSET);
> val &= ~RNG_CTRL_RNG_RBGEN_MASK;
> - val |= RNG_CTRL_RNG_RBGEN_DISABLE;
> + val &= ~RNG_CTRL_RNG_RBGEN_ENABLE;
> iowrite32(val, priv->base + RNG_CTRL_OFFSET);
> }
>