[GIT pull] x86/fpu for v5.11-rc1
From: Thomas Gleixner
Date: Mon Dec 14 2020 - 15:38:59 EST
Linus,
please pull the latest x86/fpu branch from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-fpu-2020-12-14
up to: cba08c5dc6dc: x86/fpu: Make kernel FPU protection RT friendly
X86 FPU updates:
- Simplify the FPU protection for !RT kernels
- Add the RT variant of FPU protections
Thanks,
tglx
------------------>
Thomas Gleixner (2):
x86/fpu: Simplify fpregs_[un]lock()
x86/fpu: Make kernel FPU protection RT friendly
arch/x86/include/asm/fpu/api.h | 23 +++++++++++++++++++----
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/arch/x86/include/asm/fpu/api.h b/arch/x86/include/asm/fpu/api.h
index dcd9503b1098..a5aba4ab0224 100644
--- a/arch/x86/include/asm/fpu/api.h
+++ b/arch/x86/include/asm/fpu/api.h
@@ -29,17 +29,32 @@ extern void fpregs_mark_activate(void);
* A context switch will (and softirq might) save CPU's FPU registers to
* fpu->state and set TIF_NEED_FPU_LOAD leaving CPU's FPU registers in
* a random state.
+ *
+ * local_bh_disable() protects against both preemption and soft interrupts
+ * on !RT kernels.
+ *
+ * On RT kernels local_bh_disable() is not sufficient because it only
+ * serializes soft interrupt related sections via a local lock, but stays
+ * preemptible. Disabling preemption is the right choice here as bottom
+ * half processing is always in thread context on RT kernels so it
+ * implicitly prevents bottom half processing as well.
+ *
+ * Disabling preemption also serializes against kernel_fpu_begin().
*/
static inline void fpregs_lock(void)
{
- preempt_disable();
- local_bh_disable();
+ if (!IS_ENABLED(CONFIG_PREEMPT_RT))
+ local_bh_disable();
+ else
+ preempt_disable();
}
static inline void fpregs_unlock(void)
{
- local_bh_enable();
- preempt_enable();
+ if (!IS_ENABLED(CONFIG_PREEMPT_RT))
+ local_bh_enable();
+ else
+ preempt_enable();
}
#ifdef CONFIG_X86_DEBUG_FPU