Re: [PATCH net v1 2/2] lan743x: boost performance: limit PCIe bandwidth requirement

[Sven Van Asbroeck]

On Wed, Dec 16, 2020 at 8:01 PM Florian Fainelli <f.fainelli@xxxxxxxxx> wrote:
>
> x86 is a fully cache and device coherent memory architecture and there
> are smarts like DDIO to bring freshly DMA'd data into the L3 cache
> directly. For ARMv7, it depends on the hardware you have, most ARMv7
> SoCs do not have hardware maintained coherency at all, this means that
> doing the cache maintenance operations is costly. This is even true on
> platforms that use an external cache controller (PL310).

Thank you, that's quite fascinating. The functions my armv7 spends most
time in during ethernet receive (eg. v7_dma_inv_range) do appear to be
just nops on x86.