[PATCH 3/3] MIPS: cpu-probe: Vulnerabilities for Loongson cores

[Jiaxun Yang]

Loongson64C is known to be vulnerable to meltdown according to
PoC from Rui Wang <r@xxxxxx>.

Loongson64G defended these side-channel attack by silicon.

Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
---
 arch/mips/kernel/cpu-probe.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 2460783dbdb1..24b21f51353c 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -2092,6 +2092,8 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
 		c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
 			MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2);
 		c->ases &= ~MIPS_ASE_VZ; /* VZ of Loongson-3A2000/3000 is incomplete */
+		c->vulnerabilities |= MIPS_VULNBL_MELTDOWN;
+		c->vulnerable |= MIPS_VULNBL_MELTDOWN;
 		break;
 	case PRID_IMP_LOONGSON_64G:
 		c->cputype = CPU_LOONGSON64;
@@ -2100,6 +2102,8 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
 		set_isa(c, MIPS_CPU_ISA_M64R2);
 		decode_cpucfg(c);
 		c->writecombine = _CACHE_UNCACHED_ACCELERATED;
+		c->vulnerabilities |= MIPS_VULNBL_MELTDOWN |
+			      MIPS_VULNBL_SPECTRE_V1 | MIPS_VULNBL_SPECTRE_V2;
 		break;
 	default:
 		panic("Unknown Loongson Processor ID!");
-- 
2.30.0