Re: [PATCH] regmap: irq: do not allow setting irq bits during ack

[Tim Harvey]

On Wed, Dec 30, 2020 at 5:14 AM Mark Brown <broonie@xxxxxxxxxx> wrote:
>
> On Tue, Dec 29, 2020 at 08:23:00AM -0800, Tim Harvey wrote:
> > On Tue, Dec 29, 2020 at 5:06 AM Mark Brown <broonie@xxxxxxxxxx> wrote:
>
> > > I can't understand what this commit message is trying to say, sorry.
> > > Which bits are you talking about when you say "if bits are set"?  Isn't
> > > acknowleding the interrupt clearing the bits asserting the interrupt?  I
> > > can't tell what the problem you're trying to fix is.
>
> > If for example status=0x01 the current code for ack_invert will write
> > a 0xfe to clear that bit which ends up setting all other interrupt
> > bits keeping the interrupt from ever being de-asserted. With the patch
> > applied a status=0x01 will result in a 0x00 written to clear that bit
> > and keep other's from being set.
>
> But that's not an inverted ack as far as I can see?  That's writing back
> the bit you're trying to clear which is the default ack.  Why do you
> believe this is an inverted ack?  In any case the changelog for the
> patch needs to be clear.

Mark,

It 'is' inverted ack because the device I have requires a '0' to be
written to clear the interrupt instead of a '1'.

The chip I'm using has a status register where bit values of 1
indicate an interrupt assertion and to clear it you write a 0 (where
as the typical non-ack-invert case you write a 1 to clear). The chip
I'm using also allows you to 'set' (by writing a 1) to bits that were
not already set which would keep it from de-asserting it's interrupt.

Honestly I thought the commit message was very clear. What exactly is
your suggestion? It is of course confusing when talking about code
that handles both ack invert and the normal case (let alone the new
case of 'clear_ack').

Best regards,

Tim