Re: (subset) [PATCH v5 0/9] Add Tegra Quad SPI driver

[Mark Brown]

On Mon, 21 Dec 2020 13:17:30 -0800, Sowjanya Komatineni wrote:
> This series adds Tegra210, Tegra186, and Tegra194 Quad SPI driver and
> enables Quad SPI on Jetson Nano and Jetson Xavier NX.
> 
> QSPI controller is available on Tegra210, Tegra186 and Tegra194.
> 
> Tegra186 and Tegra194 has additional feature of combined sequence mode
> where command, address and data can all be transferred in a single transfer.
> Combined sequence mode is useful only when using DMA mode transfer.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/9] dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM
      commit: b499779761278d6f5339daa230938211d98861ef
[2/9] dt-bindings: spi: Add Tegra Quad SPI device tree binding
      commit: 9684752e5fe3989b45f686a4e0202a683038be4a
[3/9] MAINTAINERS: Add Tegra Quad SPI driver section
      commit: e5c92bb924ce4bda9c4312b8596cf62ad7b07e2e
[4/9] spi: tegra210-quad: Add support for Tegra210 QSPI controller
      commit: 921fc1838fb036f690b8ba52e6a6d3644b475cbb
[5/9] spi: spi-mem: Mark dummy transfers by setting dummy_data bit
      commit: 98621ed011c57ba6e52e01a5982b221c9943b6d9
[6/9] spi: tegra210-quad: Add support for hardware dummy cycles transfer
      commit: 6a8a8b51703c69fa2d6adbbcbf731ce9b991c696

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark