Re: [PATCH v2 4/5] csky: Fixup asm/cmpxchg.h with correct ordering barrier

[Peter Zijlstra]

On Sun, Dec 20, 2020 at 03:39:22PM +0000, guoren@xxxxxxxxxx wrote:


> +#define cmpxchg(ptr, o, n) 					\
> +({								\
> +	__typeof__(*(ptr)) __ret;				\
> +	__smp_release_fence();					\
> +	__ret = cmpxchg_relaxed(ptr, o, n);			\
> +	__smp_acquire_fence();					\
> +	__ret;							\
> +})

So you failed to Cc me on patch #2 that introduces these barriers. I've
dug it out, but I'm still terribly confused on all that.

On first reading the above looks wrong.

Could you also clarify the difference (if any) between your bar.brwarw
and sync instruction?

Specifically, about transitiviry, or whatever we seem to be calling that
today.