[PATCH v3 0/2] rtc: pcf2127: proper initialization after power loss

[Philipp Rosenberger]

If the PCF2127/2129 loses power it needs some initialization to work
correctly. A bootloader/firmware might do this. If not we should do this
in the driver.

Changes for v3:
- drop the test if clearing PORO was successful
- only run OTP refresh if OTPR bit is not already set

Changes for v2:
- make commit log and comments more clear
- check if PORO was really disabled

Philipp Rosenberger (2):
  rtc: pcf2127: Disable Power-On Reset Override
  rtc: pcf2127: Run a OTP refresh if not done before

 drivers/rtc/rtc-pcf2127.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

Interdiff against v2:
diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c
index ca56dba64e79..b48fa27cf093 100644
--- a/drivers/rtc/rtc-pcf2127.c
+++ b/drivers/rtc/rtc-pcf2127.c
@@ -568,6 +568,7 @@ static int pcf2127_probe(struct device *dev, struct regmap *regmap,
 {
 	struct pcf2127 *pcf2127;
 	int ret = 0;
+	unsigned int val;
 
 	dev_dbg(dev, "%s\n", __func__);
 
@@ -622,29 +623,19 @@ static int pcf2127_probe(struct device *dev, struct regmap *regmap,
 	 */
 	regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
 				PCF2127_BIT_CTRL1_POR_OVRD);
-	/*
-	 * If the PORO can't be disabled, just move on. The RTC should
-	 * work fine, but functions like watchdog and alarm interrupts might
-	 * not work. There will be no interrupt generated on the interrupt pin.
-	 */
-	ret = regmap_test_bits(pcf2127->regmap, PCF2127_REG_CTRL1, PCF2127_BIT_CTRL1_POR_OVRD);
-	if (ret <= 0) {
-		dev_err(dev, "%s: can't disable PORO (ctrl1).\n", __func__);
-		dev_warn(dev, "Watchdog and alarm functions might not work properly\n");
-	}
 
-	/*
-	 * Set the OTP refresh bit unconditionally. If an OTP refresh was
-	 * already done the bit is already set and will not rerun the refresh
-	 * operation.
-	 */
-	ret = regmap_set_bits(pcf2127->regmap, PCF2127_REG_CLKOUT,
-			      PCF2127_BIT_CLKOUT_OTPR);
-	if (ret < 0) {
-		dev_err(dev, "%s: OTP refresh (clkout_ctrl) failed.\n", __func__);
+	ret = regmap_read(pcf2127->regmap, PCF2127_REG_CLKOUT, &val);
+	if (ret < 0)
 		return ret;
+
+	if (!(val & PCF2127_BIT_CLKOUT_OTPR)) {
+		ret = regmap_set_bits(pcf2127->regmap, PCF2127_REG_CLKOUT,
+				      PCF2127_BIT_CLKOUT_OTPR);
+		if (ret < 0)
+			return ret;
+
+		msleep(100);
 	}
-	msleep(100);
 
 	/*
 	 * Watchdog timer enabled and reset pin /RST activated when timed out.
-- 
2.29.2