Re: [PATCH] net: macb: ignore tx_clk if MII is used
Date: Fri Jan 22 2021 - 04:36:07 EST
On 21.01.2021 11:41, Michael Walle wrote:
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> Hi Claudiu,
> Am 2021-01-21 10:19, schrieb Claudiu.Beznea@xxxxxxxxxxxxx:
>> On 20.01.2021 21:43, Michael Walle wrote:
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>>> If the MII interface is used, the PHY is the clock master, thus don't
>>> set the clock rate. On Zynq-7000, this will prevent the following
>>> macb e000b000.ethernet eth0: unable to generate target frequency:
>>> 25000000 Hz
>> Since in this case the PHY provides the TX clock and it provides the
>> rate based on link speed, the MACB driver should not handle the
>> at all (MACB driver uses this clock only for setting the proper rate on
>> based on link speed). So, I believe the proper fix would be to not pass
>> tx_clk at all in device tree. This clock is optional for MACB driver.
> Thanks for looking into this.
> I had the same thought. But shouldn't the driver handle this case
> I mean it does know that the clock isn't needed at all.
Currently it may knows that by checking the bp->tx_clk. Moreover the clock
could be provided by PHY not only for MII interface.
Moreover the IP has the bit "refclk" of register at offset 0xc (userio)
that tells it to use the clock provided by PHY or to use one internal to
the SoC. If a SoC generated clock would be used the IP logic may have the
option to do the proper division based on link speed (if IP has this option
enabled then this should be selected in driver with capability
If the clock provided by the PHY is the one to be used then this is
selected with capability MACB_CAPS_USRIO_HAS_CLKEN. So, if the change you
proposed in this patch is still imperative then checking for this
capability would be the best as the clock could be provided by PHY not only
for MII interface.
> Ususually that
> is defined in a device tree include. So you'd have to redefine that node
> an actual board file which means duplicating the other clocks.