Re: [PATCH 2/3] drm/mediatek: mtk_dpi: Add dpi config for mt8192
From: kernel test robot
Date: Sun Feb 07 2021 - 12:26:22 EST
Hi Jitao,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on linux/master linus/master v5.11-rc6 next-20210125]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Jitao-Shi/Add-check-for-max-clock-rate-in-mode_valid/20210207-210121
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm64-allyesconfig (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/094ecc22dd2d9bfee293b97b33ba267a861ee301
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Jitao-Shi/Add-check-for-max-clock-rate-in-mode_valid/20210207-210121
git checkout 094ecc22dd2d9bfee293b97b33ba267a861ee301
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>
Note: the linux-review/Jitao-Shi/Add-check-for-max-clock-rate-in-mode_valid/20210207-210121 HEAD 9361778ccbd0d19a6c7376b1f3489b6e5063bb73 builds fine.
It only hurts bisectibility.
All errors (new ones prefixed by >>):
drivers/gpu/drm/mediatek/mtk_dpi.c:574:16: error: initialization of 'enum drm_mode_status (*)(struct drm_bridge *, const struct drm_display_info *, const struct drm_display_mode *)' from incompatible pointer type 'enum drm_mode_status (*)(struct drm_bridge *, const struct drm_display_mode *)' [-Werror=incompatible-pointer-types]
574 | .mode_valid = mtk_dpi_bridge_mode_valid,
| ^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/mediatek/mtk_dpi.c:574:16: note: (near initialization for 'mtk_dpi_bridge_funcs.mode_valid')
>> drivers/gpu/drm/mediatek/mtk_dpi.c:709:3: error: 'const struct mtk_dpi_conf' has no member named 'dual_edge'
709 | .dual_edge = true,
| ^~~~~~~~~
drivers/gpu/drm/mediatek/mtk_dpi.c:710:19: warning: initialized field overwritten [-Woverride-init]
710 | .max_clock_khz = 150000,
| ^~~~~~
drivers/gpu/drm/mediatek/mtk_dpi.c:710:19: note: (near initialization for 'mt8192_conf.max_clock_khz')
cc1: some warnings being treated as errors
vim +709 drivers/gpu/drm/mediatek/mtk_dpi.c
570
571 static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
572 .attach = mtk_dpi_bridge_attach,
573 .mode_set = mtk_dpi_bridge_mode_set,
> 574 .mode_valid = mtk_dpi_bridge_mode_valid,
575 .disable = mtk_dpi_bridge_disable,
576 .enable = mtk_dpi_bridge_enable,
577 };
578
579 static void mtk_dpi_start(struct mtk_ddp_comp *comp)
580 {
581 struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp);
582
583 mtk_dpi_power_on(dpi);
584 }
585
586 static void mtk_dpi_stop(struct mtk_ddp_comp *comp)
587 {
588 struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp);
589
590 mtk_dpi_power_off(dpi);
591 }
592
593 static const struct mtk_ddp_comp_funcs mtk_dpi_funcs = {
594 .start = mtk_dpi_start,
595 .stop = mtk_dpi_stop,
596 };
597
598 static int mtk_dpi_bind(struct device *dev, struct device *master, void *data)
599 {
600 struct mtk_dpi *dpi = dev_get_drvdata(dev);
601 struct drm_device *drm_dev = data;
602 int ret;
603
604 ret = mtk_ddp_comp_register(drm_dev, &dpi->ddp_comp);
605 if (ret < 0) {
606 dev_err(dev, "Failed to register component %pOF: %d\n",
607 dev->of_node, ret);
608 return ret;
609 }
610
611 ret = drm_simple_encoder_init(drm_dev, &dpi->encoder,
612 DRM_MODE_ENCODER_TMDS);
613 if (ret) {
614 dev_err(dev, "Failed to initialize decoder: %d\n", ret);
615 goto err_unregister;
616 }
617
618 dpi->encoder.possible_crtcs = mtk_drm_find_possible_crtc_by_comp(drm_dev, dpi->ddp_comp);
619
620 ret = drm_bridge_attach(&dpi->encoder, &dpi->bridge, NULL, 0);
621 if (ret) {
622 dev_err(dev, "Failed to attach bridge: %d\n", ret);
623 goto err_cleanup;
624 }
625
626 dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS;
627 dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB;
628 dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB;
629 dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB;
630
631 return 0;
632
633 err_cleanup:
634 drm_encoder_cleanup(&dpi->encoder);
635 err_unregister:
636 mtk_ddp_comp_unregister(drm_dev, &dpi->ddp_comp);
637 return ret;
638 }
639
640 static void mtk_dpi_unbind(struct device *dev, struct device *master,
641 void *data)
642 {
643 struct mtk_dpi *dpi = dev_get_drvdata(dev);
644 struct drm_device *drm_dev = data;
645
646 drm_encoder_cleanup(&dpi->encoder);
647 mtk_ddp_comp_unregister(drm_dev, &dpi->ddp_comp);
648 }
649
650 static const struct component_ops mtk_dpi_component_ops = {
651 .bind = mtk_dpi_bind,
652 .unbind = mtk_dpi_unbind,
653 };
654
655 static unsigned int mt8173_calculate_factor(int clock)
656 {
657 if (clock <= 27000)
658 return 3 << 4;
659 else if (clock <= 84000)
660 return 3 << 3;
661 else if (clock <= 167000)
662 return 3 << 2;
663 else
664 return 3 << 1;
665 }
666
667 static unsigned int mt2701_calculate_factor(int clock)
668 {
669 if (clock <= 64000)
670 return 4;
671 else if (clock <= 128000)
672 return 2;
673 else
674 return 1;
675 }
676
677 static unsigned int mt8183_calculate_factor(int clock)
678 {
679 if (clock <= 27000)
680 return 8;
681 else if (clock <= 167000)
682 return 4;
683 else
684 return 2;
685 }
686
687 static const struct mtk_dpi_conf mt8173_conf = {
688 .cal_factor = mt8173_calculate_factor,
689 .reg_h_fre_con = 0xe0,
690 .max_clock_khz = 300000,
691 };
692
693 static const struct mtk_dpi_conf mt2701_conf = {
694 .cal_factor = mt2701_calculate_factor,
695 .reg_h_fre_con = 0xb0,
696 .edge_sel_en = true,
697 .max_clock_khz = 150000,
698 };
699
700 static const struct mtk_dpi_conf mt8183_conf = {
701 .cal_factor = mt8183_calculate_factor,
702 .reg_h_fre_con = 0xe0,
703 .max_clock_khz = 100000,
704 };
705
706 static const struct mtk_dpi_conf mt8192_conf = {
707 .cal_factor = mt8183_calculate_factor,
708 .reg_h_fre_con = 0xe0,
> 709 .dual_edge = true,
710 .max_clock_khz = 150000,
711 };
712
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx
Attachment:
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