[PATCH 06/49] perf/x86: Hybrid PMU support for unconstrained

From: kan . liang
Date: Mon Feb 08 2021 - 13:00:34 EST


From: Kan Liang <kan.liang@xxxxxxxxxxxxxxx>

The unconstrained value depends on the number of GP and fixed counters.
Each hybrid PMU should use its own unconstrained.

Reviewed-by: Andi Kleen <ak@xxxxxxxxxxxxxxx>
Signed-off-by: Kan Liang <kan.liang@xxxxxxxxxxxxxxx>
---
arch/x86/events/intel/core.c | 5 ++++-
arch/x86/events/perf_event.h | 1 +
2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 3b8d728..9baa6b6 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3147,7 +3147,10 @@ x86_get_event_constraints(struct cpu_hw_events *cpuc, int idx,
}
}

- return &unconstrained;
+ if (!HAS_VALID_HYBRID_PMU_IN_CPUC(cpuc))
+ return &unconstrained;
+
+ return &x86_pmu.hybrid_pmu[cpuc->hybrid_pmu_idx].unconstrained;
}

static struct event_constraint *
diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index bda4bdc..f11dbc4 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -651,6 +651,7 @@ struct x86_hybrid_pmu {
int max_pebs_events;
int num_counters;
int num_counters_fixed;
+ struct event_constraint unconstrained;
};

#define IS_X86_HYBRID cpu_feature_enabled(X86_FEATURE_HYBRID_CPU)
--
2.7.4