Re: [PATCH 1/2] PCI: xilinx-nwl: Enable coherent PCIe DMA traffic using CCI
From: Krzysztof Wilczyński
Date: Wed Feb 10 2021 - 16:46:28 EST
Hi Bharat,
Thank you for sending the patches over!
> Add support for routing PCIe DMA traffic coherently when
> Cache Coherent Interconnect (CCI) is enabled in the system.
> The "dma-coherent" property is used to determine if CCI is enabled
> or not.
> Refer https://developer.arm.com/documentation/ddi0470/k/preface
> for CCI specification.
[...]
A small nitpick, so feel free to ignore, of course.
Perhaps "Refer to" and "for the CCI", etc.
[...]
> + /* This routes the PCIe DMA traffic to go through CCI path */
> + if (of_dma_is_coherent(dev->of_node)) {
> + nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, BRCFG_PCIE_RX1) |
> + CFG_PCIE_CACHE, BRCFG_PCIE_RX1);
> + }
[...]
A suggestion.
You can drop the curly brackets here if you want to keep the style used
in the kernel, especially for when there is a single statement inside
the code block.
Krzysztof