linux-next: manual merge of the net-next tree with the arm-soc tree

[Stephen Rothwell]

Hi all,

Today's linux-next merge of the net-next tree got conflicts in:

  arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts
  arch/arm64/boot/dts/toshiba/tmpv7708.dtsi

between commits:

  4fd18fc38757 ("arm64: dts: visconti: Add watchdog support for TMPV7708 SoC")
  0109a17564fc ("arm: dts: visconti: Add DT support for Toshiba Visconti5 GPIO driver")

from the arm-soc tree and commit:

  ec8a42e73432 ("arm: dts: visconti: Add DT support for Toshiba Visconti5 ethernet controller")

from the net-next tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts
index 2407b2d89c1e,48fa8776e36f..000000000000
--- a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts
+++ b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts
@@@ -42,11 -42,20 +42,29 @@@
  	clock-names = "apb_pclk";
  };
  
 +&wdt {
 +	status = "okay";
 +	clocks = <&wdt_clk>;
 +};
 +
 +&gpio {
 +	status = "okay";
++};`
++
+ &piether {
+ 	status = "okay";
+ 	phy-handle = <&phy0>;
+ 	phy-mode = "rgmii-id";
+ 	clocks = <&clk300mhz>, <&clk125mhz>;
+ 	clock-names = "stmmaceth", "phy_ref_clk";
+ 
+ 	mdio0 {
+ 		#address-cells = <1>;
+ 		#size-cells = <0>;
+ 		compatible = "snps,dwmac-mdio";
+ 		phy0: ethernet-phy@1 {
+ 			device_type = "ethernet-phy";
+ 			reg = <0x1>;
+ 		};
+ 	};
  };
diff --cc arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
index 4264f3e6ac9c,3366786699fc..000000000000
--- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
+++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
@@@ -134,12 -134,20 +134,26 @@@
  		#clock-cells = <0>;
  	};
  
 +	wdt_clk: wdt-clk {
 +		compatible = "fixed-clock";
 +		clock-frequency = <150000000>;
 +		#clock-cells = <0>;
 +	};
 +
+ 	clk125mhz: clk125mhz {
+ 		compatible = "fixed-clock";
+ 		clock-frequency = <125000000>;
+ 		#clock-cells = <0>;
+ 		clock-output-names = "clk125mhz";
+ 	};
+ 
+ 	clk300mhz: clk300mhz {
+ 		compatible = "fixed-clock";
+ 		clock-frequency = <300000000>;
+ 		#clock-cells = <0>;
+ 		clock-output-names = "clk300mhz";
+ 	};
+ 
  	soc {
  		#address-cells = <2>;
  		#size-cells = <2>;
@@@ -402,11 -399,16 +416,22 @@@
  			status = "disabled";
  		};
  
 +		wdt: wdt@28330000 {
 +			compatible = "toshiba,visconti-wdt";
 +			reg = <0 0x28330000 0 0x1000>;
 +			status = "disabled";
 +		};
++
+ 		piether: ethernet@28000000 {
+ 			compatible = "toshiba,visconti-dwmac", "snps,dwmac-4.20a";
+ 			reg = <0 0x28000000 0 0x10000>;
+ 			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ 			interrupt-names = "macirq";
+ 			snps,txpbl = <4>;
+ 			snps,rxpbl = <4>;
+ 			snps,tso;
+ 			status = "disabled";
+ 		};
  	};
  };

Attachment: pgp8ZUSeZziED.pgp
Description: OpenPGP digital signature