Re: [PATCH v5 3/3] bus: mhi: core: Process execution environment changes serially

From: kernel test robot
Date: Fri Feb 19 2021 - 20:52:53 EST


Hi Bhaumik,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on linus/master]
[also build test WARNING on v5.11 next-20210219]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url: https://github.com/0day-ci/linux/commits/Bhaumik-Bhatt/Serialize-execution-environment-changes-for-MHI/20210220-071426
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git f40ddce88593482919761f74910f42f4b84c004b
config: mips-randconfig-r033-20210219 (attached as .config)
compiler: mipsel-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/e38872b38ede9c5c1706cd11bf5792f8dc436fcf
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Bhaumik-Bhatt/Serialize-execution-environment-changes-for-MHI/20210220-071426
git checkout e38872b38ede9c5c1706cd11bf5792f8dc436fcf
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=mips

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>

All warnings (new ones prefixed by >>):

drivers/bus/mhi/core/main.c: In function 'mhi_intvec_threaded_handler':
>> drivers/bus/mhi/core/main.c:436:17: warning: this statement may fall through [-Wimplicit-fallthrough=]
436 | mhi_cntrl->ee = ee;
| ~~~~~~~~~~~~~~^~~~
drivers/bus/mhi/core/main.c:438:2: note: here
438 | default:
| ^~~~~~~


vim +436 drivers/bus/mhi/core/main.c

392
393 irqreturn_t mhi_intvec_threaded_handler(int irq_number, void *priv)
394 {
395 struct mhi_controller *mhi_cntrl = priv;
396 struct device *dev = &mhi_cntrl->mhi_dev->dev;
397 enum mhi_state state = MHI_STATE_MAX;
398 enum mhi_pm_state pm_state = 0;
399 enum mhi_ee_type ee = MHI_EE_MAX;
400
401 write_lock_irq(&mhi_cntrl->pm_lock);
402 if (!MHI_REG_ACCESS_VALID(mhi_cntrl->pm_state)) {
403 write_unlock_irq(&mhi_cntrl->pm_lock);
404 goto exit_intvec;
405 }
406
407 state = mhi_get_mhi_state(mhi_cntrl);
408 ee = mhi_get_exec_env(mhi_cntrl);
409 dev_dbg(dev, "local ee:%s device ee:%s dev_state:%s\n",
410 TO_MHI_EXEC_STR(mhi_cntrl->ee), TO_MHI_EXEC_STR(ee),
411 TO_MHI_STATE_STR(state));
412
413 if (state == MHI_STATE_SYS_ERR) {
414 dev_dbg(dev, "System error detected\n");
415 pm_state = mhi_tryset_pm_state(mhi_cntrl,
416 MHI_PM_SYS_ERR_DETECT);
417 }
418 write_unlock_irq(&mhi_cntrl->pm_lock);
419
420 if (pm_state != MHI_PM_SYS_ERR_DETECT || ee == mhi_cntrl->ee)
421 goto exit_intvec;
422
423 switch (ee) {
424 case MHI_EE_RDDM:
425 /* proceed if power down is not already in progress */
426 if (mhi_cntrl->rddm_image && mhi_is_active(mhi_cntrl)) {
427 mhi_cntrl->status_cb(mhi_cntrl, MHI_CB_EE_RDDM);
428 mhi_cntrl->ee = ee;
429 wake_up_all(&mhi_cntrl->state_event);
430 }
431 break;
432 case MHI_EE_PBL:
433 case MHI_EE_EDL:
434 case MHI_EE_PTHRU:
435 mhi_cntrl->status_cb(mhi_cntrl, MHI_CB_FATAL_ERROR);
> 436 mhi_cntrl->ee = ee;
437 /* continue */
438 default:
439 mhi_pm_sys_err_handler(mhi_cntrl);
440 wake_up_all(&mhi_cntrl->state_event);
441 break;
442 }
443
444 exit_intvec:
445
446 return IRQ_HANDLED;
447 }
448

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx

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