On Thu, Feb 25, 2021 at 10:35:28AM +0800, Liguang Zhang wrote:
IC_DATA_CMD[11] indicates the first data byte received after the addressThanks for the report and fix!
phase for receive transfer in Master receiver or Slave receiver mode,
this bit was set in some transfer flow. IC_DATA_CMD[7:0] contains the
data to be transmitted or received on the I2C bus, so we should use the
lower 8 bits to get the right data length.
My comments below.
Signed-off-by: Liguang Zhang <zhangliguang@xxxxxxxxxxxxxxxxx>Can we rather describe this as
---
drivers/i2c/busses/i2c-designware-master.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busses/i2c-designware-master.c
index d6425ad6e6a3..c3cf76f6c607 100644
--- a/drivers/i2c/busses/i2c-designware-master.c
+++ b/drivers/i2c/busses/i2c-designware-master.c
@@ -432,7 +432,7 @@ i2c_dw_read(struct dw_i2c_dev *dev)
regmap_read(dev->map, DW_IC_DATA_CMD, &tmp);
/* Ensure length byte is a valid value */
if (flags & I2C_M_RECV_LEN &&
- tmp <= I2C_SMBUS_BLOCK_MAX && tmp > 0) {
+ (tmp & 0xff) <= I2C_SMBUS_BLOCK_MAX && tmp > 0) {
#define DW_IC_DATA_CMD_DAT GENMASK(7, 0)
in *.h file and...
(tmp & DW_IC_DATA_CMD_DAT) <= I2C_SMBUS_BLOCK_MAX && tmp > 0) {
...here?
len = i2c_dw_recv_len(dev, tmp);
}
*buf++ = tmp;
--
2.19.1.6.gb485710b