Re: [PATCH 1/3] clocksource/drivers/timer-ti-dm: Fix posted mode status check order

[Grygorii Strashko]

On 05/03/2021 09:53, Tony Lindgren wrote:
> * Grygorii Strashko <grygorii.strashko@xxxxxx> [210304 20:58]:
> > On 04/03/2021 09:21, Tony Lindgren wrote:
> > > When the timer is configured in posted mode, we need to check the write-
> > > posted status register (TWPS) before writing to the register.
> ...
>
> > > --- a/drivers/clocksource/timer-ti-dm-systimer.c
> > > +++ b/drivers/clocksource/timer-ti-dm-systimer.c
> > > @@ -449,13 +449,13 @@ static int dmtimer_set_next_event(unsigned long cycles,
> > >    	struct dmtimer_systimer *t = &clkevt->t;
> > >    	void __iomem *pend = t->base + t->pend;
> > > -	writel_relaxed(0xffffffff - cycles, t->base + t->counter);
> > >    	while (readl_relaxed(pend) & WP_TCRR)
> > >    		cpu_relax();
> > > +	writel_relaxed(0xffffffff - cycles, t->base + t->counter);
> > > -	writel_relaxed(OMAP_TIMER_CTRL_ST, t->base + t->ctrl);
> > >    	while (readl_relaxed(pend) & WP_TCLR)
> > >    		cpu_relax();
> > > +	writel_relaxed(OMAP_TIMER_CTRL_ST, t->base + t->ctrl);
> >
> > It seems static [and inline] helper here could be better solution. no?
>
> Well we wanted to get rid of the confusing macros. And in this case I
> suspect we can eventually do just one read of the pending register for
> the registers used mask rather than check the status separately multiple
> times. But that needs to be carefully tested and is not a fix :)

Might work.

--
Best regards,
grygorii