Re: [PATCH V2 20/25] perf/x86/intel: Add Alder Lake Hybrid support

[Liang, Kan]

On 3/11/2021 2:58 PM, Peter Zijlstra wrote:
> On Thu, Mar 11, 2021 at 11:53:35AM -0500, Liang, Kan wrote:
>
> > > > The "cpu_core" PMU is similar to the Sapphire Rapids PMU, but without
> > > > PMEM.
> > > > The "cpu_atom" PMU is similar to Tremont, but with different
> > > > event_constraints, extra_regs and number of counters.
>
> > > So do these things use the same event lists as SPR and TNT?
> >
> > No, there will be two new event lists on ADL. One is for Atom core, and the
> > other is for big core. They are different to SPR and TNT.
>
> *sigh* how different?

The core PMU event list should be similar between SPR and the big core 
of ADL, because they both utilize the Golden Cove core. But the uncore 
PMU event list is totally different for client and server.

The Atom core of ADL utilizes the Gracemont core, which is a successor 
to Tremont. It introduces many new events. We cannot use the Tremont 
event list instead.


> > > My desktop has: cpu/caps/pmu_name and that gives "skylake", do we want
> > > the above to have cpu_core/caps/pmu_name give "sapphire_rapids" etc.. ?
> >
> > I think current implementation should be good enough.
> >
> > $ cat /sys/devices/cpu_atom/caps/pmu_name
> > alderlake_hybrid
> >
> > "alderlake_hybrid" tells the perf tool that it's Alder Lake Hybrid system.
> > "cpu_atom" tells the perf tool that it's for Atom core.
>
> Yeah, but then I have to ask Google wth those atoms and cores actually
> are. Why not tell me upfront?
>
> Since we're now working on it, we all know, but in 6 months time nobody
> will remember and then we'll constantly have to look it up and curse
> ourselves for not doing better.

I think the "sapphire_rapids" is the code name for the server platform.
Maybe we should use the code name of core?

$ cat /sys/devices/cpu_atom/caps/pmu_name
gracemont
$ cat /sys/devices/cpu_core/caps/pmu_name
golden_cove


Thanks,
Kan