[PATCH V2] staging: rtl8723bs: Mundane typo fixes

From: Bhaskar Chowdhury
Date: Mon Mar 22 2021 - 16:17:55 EST


s/stoping/stopping/
s/arragement/arrangement/
s/eralier/earlier/

Plus one extra word in the sentence "the" removed.

Signed-off-by: Bhaskar Chowdhury <unixbhaskar@xxxxxxxxx>
---
Changes from V1:
Greg,pointed out my mistake of introducing typo to typo , corrected.

drivers/staging/rtl8723bs/include/hal_com_reg.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/rtl8723bs/include/hal_com_reg.h b/drivers/staging/rtl8723bs/include/hal_com_reg.h
index 37fa59a352d6..b555826760d0 100644
--- a/drivers/staging/rtl8723bs/include/hal_com_reg.h
+++ b/drivers/staging/rtl8723bs/include/hal_com_reg.h
@@ -1002,9 +1002,9 @@ Current IOREG MAP
/* 8192C (TXPAUSE) transmission pause (Offset 0x522, 8 bits) */
/* */
/* Note: */
-/* The the bits of stoping AC(VO/VI/BE/BK) queue in datasheet RTL8192S/RTL8192C are wrong, */
-/* the correct arragement is VO - Bit0, VI - Bit1, BE - Bit2, and BK - Bit3. */
-/* 8723 and 88E may be not correct either in the eralier version. Confirmed with DD Tim. */
+/* The bits of stopping AC(VO/VI/BE/BK) queue in datasheet RTL8192S/RTL8192C are wrong, */
+/* the correct arrangement is VO - Bit0, VI - Bit1, BE - Bit2, and BK - Bit3. */
+/* 8723 and 88E may be not correct either in the earlier version. Confirmed with DD Tim. */
/* By Bruce, 2011-09-22. */
#define StopBecon BIT6
#define StopHigh BIT5
--
2.31.0