Re: [PATCH v4 14/22] x86/fpu/xstate: Expand the xstate buffer on the first use of dynamic user state

[Thomas Gleixner]

On Mon, Mar 29 2021 at 11:43, Len Brown wrote:
> On Mon, Mar 29, 2021 at 9:33 AM Thomas Gleixner <tglx@xxxxxxxxxxxxx> wrote:
> But yes, if a bare metal OS doesn't support any threading libraries
> that query XCR0 with xgetbv, and they don't care about the performance
> impact of switching XCR0, they could choose to switch XCR0 and
> would want to TILERELEASE to assure C6 access, if it is enabled.

That's not the point. The C6 issue has nothing to do with the ABI
considerations vs. XCR0.

According to documentation it is irrelevant whether AMX usage is
disabled via XCR0, CR4.OSXSAVE or XFD[18]. In any case the effect of
AMX INIT=0 will prevent C6.

As I explained in great length there are enough ways to get into a
situation where this can happen and a CPU goes idle with AMX INIT=0.

So what are we supposed to do?

   - Use TILERELEASE on context switch after XSAVES?

   - Any other mechanism on context switch

   - Clear XFD[18] when going idle and issue TILERELEASE depending
     on the last state

   - Use any other means to set the thing back into INIT=1 state when
     going idle

There is no option 'shrug and ignore' unfortunately.

Thanks,

        tglx