Re: [PATCH RFC/RFT 1/1] misc: add simple logic analyzer using polling

[Wolfram Sang]

> > +snipplet which analyzes an I2C bus at 400KHz on a Renesas Salvator-XS board,
> 
>    snippet

Thanks!

> 
> > +the following settings are used: The isolated CPU shall be CPU1 because it is a
> > +big core in a big.LITTLE setup. Because CPU1 is the default, we don't need a
> > +parameter. The bus speed is 400kHz. So, the sampling theorem says we need to
> > +sample at least at 800kHz. However, falling of both, SDA and SCL, in a start
> 
> Is "falling" like a falling edge of a signal?

Yes. It seems I should make it more clear, then.

Thanks for the review, Randy!

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