[PATCH v2 0/6] NVIDIA Tegra memory improvements

From: Dmitry Osipenko
Date: Tue Mar 30 2021 - 19:06:02 EST


Hi,

This series replaces the raw voltage regulator with a power domain that
will be managing SoC core voltage. The core power domain patches are still
under review, but it's clear at this point that this is the way we will
implement the DVFS support.

The remaining Tegra20 memory bindings are converted to schema. I also
made a small improvement to the memory drivers.

Changelog:

v2: - Fixed typos in the converted schemas.
- Corrected reg entry of tegra20-mc-gart schema to use fixed number of items.
- Made power-domain to use maxItems instead of $ref phandle in schemas.

Dmitry Osipenko (6):
dt-bindings: memory: tegra20: emc: Replace core regulator with power
domain
dt-bindings: memory: tegra30: emc: Replace core regulator with power
domain
dt-bindings: memory: tegra124: emc: Replace core regulator with power
domain
dt-bindings: memory: tegra20: mc: Convert to schema
dt-bindings: memory: tegra20: emc: Convert to schema
memory: tegra: Print out info-level once per driver probe

.../nvidia,tegra124-emc.yaml | 7 +-
.../memory-controllers/nvidia,tegra20-emc.txt | 130 --------
.../nvidia,tegra20-emc.yaml | 294 ++++++++++++++++++
.../memory-controllers/nvidia,tegra20-mc.txt | 40 ---
.../memory-controllers/nvidia,tegra20-mc.yaml | 79 +++++
.../nvidia,tegra30-emc.yaml | 7 +-
drivers/memory/tegra/tegra124-emc.c | 12 +-
drivers/memory/tegra/tegra20-emc.c | 20 +-
drivers/memory/tegra/tegra30-emc.c | 18 +-
9 files changed, 406 insertions(+), 201 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt
create mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.yaml
delete mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.txt
create mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.yaml

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2.30.2