[PATCH v2 0/1] arm: topology: parse the topology from the dt
From: Ruifeng Zhang
Date: Wed Apr 14 2021 - 08:23:55 EST
From: Ruifeng Zhang <ruifeng.zhang1@xxxxxxxxxx>
In Unisoc, the sc9863a SoC which using cortex-a55, it has two software
version, one of them is the kernel running on EL1 using aarch32.
user(EL0) kernel(EL1)
sc9863a_go aarch32 aarch32
sc9863a aarch64 aarch64
When kernel runs on EL1 using aarch32, the topology will parse wrong.
For example,
The MPIDR has been written to the chip register in armv8.2 format.
For example,
core0: 0000000080000000
core1: 0000000080000100
core2: 0000000080000200
...
It will parse to:
| | aff2 | packageid | coreid |
|-------+------+-----------+--------|
| Core0 | 0 | 0 | 0 |
| Core1 | 0 | 1 | 0 |
| Core2 | 0 | 2 | 0 |
| ... | | | |
The wrong topology is that all of the coreid are 0 and unexpected
packageid.
The reason is the MPIDR format is different between armv7 and armv8.2.
armv7 (A7) mpidr is:
[11:8] [7:2] [1:0]
cluster reserved cpu
The cortex-a7 spec DDI0464F 4.3.5
https://developer.arm.com/documentation/ddi0464/f/?lang=en
armv8.2 (A55) mpidr is:
[23:16] [15:8] [7:0]
cluster cpu thread
The current arch/arm/kernel/topology code parse the MPIDR with a armv7
format. The parse code is:
void store_cpu_topology(unsigned int cpuid)
{
...
cpuid_topo->thread_id = -1;
cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 1);
...
}
Ruifeng Zhang (1):
arm: topology: parse the topology from the dt
arch/arm/kernel/topology.c | 22 ++++++----------------
drivers/base/arch_topology.c | 4 ++--
include/linux/arch_topology.h | 1 +
3 files changed, 9 insertions(+), 18 deletions(-)
--
2.17.1