Re: [PATCH 1/1] mm: Fix struct page layout on 32-bit systems
From: Matthew Wilcox
Date: Wed Apr 14 2021 - 17:36:19 EST
On Wed, Apr 14, 2021 at 09:13:22PM +0200, Jesper Dangaard Brouer wrote:
> (If others want to reproduce). First I could not reproduce on ARM32.
> Then I found out that enabling CONFIG_XEN on ARCH=arm was needed to
> cause the issue by enabling CONFIG_ARCH_DMA_ADDR_T_64BIT.
hmmm ... you should be able to provoke it by enabling ARM_LPAE,
which selects PHYS_ADDR_T_64BIT, and
config ARCH_DMA_ADDR_T_64BIT
def_bool 64BIT || PHYS_ADDR_T_64BIT
> struct page {
> long unsigned int flags; /* 0 4 */
>
> /* XXX 4 bytes hole, try to pack */
>
> union {
> struct {
> struct list_head lru; /* 8 8 */
> struct address_space * mapping; /* 16 4 */
> long unsigned int index; /* 20 4 */
> long unsigned int private; /* 24 4 */
> }; /* 8 20 */
> struct {
> dma_addr_t dma_addr; /* 8 8 */
> }; /* 8 8 */
[...]
> } __attribute__((__aligned__(8))); /* 8 24 */
> union {
> atomic_t _mapcount; /* 32 4 */
> unsigned int page_type; /* 32 4 */
> unsigned int active; /* 32 4 */
> int units; /* 32 4 */
> }; /* 32 4 */
> atomic_t _refcount; /* 36 4 */
>
> /* size: 40, cachelines: 1, members: 4 */
> /* sum members: 36, holes: 1, sum holes: 4 */
> /* forced alignments: 1, forced holes: 1, sum forced holes: 4 */
> /* last cacheline: 40 bytes */
> } __attribute__((__aligned__(8)));
If you also enable CONFIG_MEMCG or enough options to make
LAST_CPUPID_NOT_IN_PAGE_FLAGS true, you'll end up with another 4-byte
hole at the end.