On 20/04/2021 11:10, Benjamin Gaignard wrote:
Le 16/04/2021 à 17:14, Lucas Stach a écrit :Makes sense to me!
Am Freitag, dem 16.04.2021 um 15:08 +0200 schrieb Benjamin Gaignard:Hi Hans,
Le 16/04/2021 à 12:54, Lucas Stach a écrit :I'm not really in a position to give any informed opinion about that
Am Mittwoch, dem 07.04.2021 um 09:35 +0200 schrieb Benjamin Gaignard:That could replace the 3 first patches and Dt patche of this series
In order to be able to share the control hardware block betweenSorry for putting a spoke in the wheel after many iterations of the
VPUs use a syscon instead a ioremap it in the driver.
To keep the compatibility with older DT if 'nxp,imx8mq-vpu-ctrl'
phandle is not found look at 'ctrl' reg-name.
With the method it becomes useless to provide a list of register
names so remove it.
series.
We just discussed a way forward on how to handle the clocks and resets
provided by the blkctl block on i.MX8MM and later and it seems there is
a consensus on trying to provide virtual power domains from a blkctl
driver, controlling clocks and resets for the devices in the power
domain. I would like to avoid introducing yet another way of handling
the blkctl and thus would like to align the i.MX8MQ VPU blkctl with
what we are planning to do on the later chip generations.
CC'ing Jacky Bai and Peng Fan from NXP, as they were going to give this
virtual power domain thing a shot.
but that will not impact the hevc part, so I wonder if pure hevc patches
could be merged anyway ?
They are reviewed and don't depend of how the ctrl block is managed.
hvec patches, as I only skimmed them, but I don't see any reason to
delay patches 04-11 from this series until the i.MX8M platform issues
are sorted. AFAICS those things are totally orthogonal.
What do you think about this proposal to split this series ?
Get hevc part merged could allow me to continue to add features
like scaling lists, compressed reference buffers and 10-bit supports.
Regards,
Hans