Re: [PATCH v1] dmaengine: fsl-qdma: check dma_set_mask return value

From: kernel test robot
Date: Thu Apr 22 2021 - 10:45:59 EST

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In reply to: Robin Gong: "[PATCH v1] dmaengine: fsl-qdma: check dma_set_mask return value"
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Hi Robin,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on vkoul-dmaengine/next]
[also build test ERROR on v5.12-rc8 next-20210422]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url: https://github.com/0day-ci/linux/commits/Robin-Gong/dmaengine-fsl-qdma-check-dma_set_mask-return-value/20210422-174650
base: https://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git next
config: arm-randconfig-r036-20210421 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project f5446b769a7929806f72256fccd4826d66502e59)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# https://github.com/0day-ci/linux/commit/031912be67ce215987f52498c31c4859b0fecc63
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Robin-Gong/dmaengine-fsl-qdma-check-dma_set_mask-return-value/20210422-174650
git checkout 031912be67ce215987f52498c31c4859b0fecc63
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 ARCH=arm

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>

All errors (new ones prefixed by >>):

>> drivers/dma/fsl-qdma.c:1238:50: error: expected ';' after expression
ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(40))
^
;
1 error generated.

vim +1238 drivers/dma/fsl-qdma.c

1116
1117 static int fsl_qdma_probe(struct platform_device *pdev)
1118 {
1119 int ret, i;
1120 int blk_num, blk_off;
1121 u32 len, chans, queues;
1122 struct resource *res;
1123 struct fsl_qdma_chan *fsl_chan;
1124 struct fsl_qdma_engine *fsl_qdma;
1125 struct device_node *np = pdev->dev.of_node;
1126
1127 ret = of_property_read_u32(np, "dma-channels", &chans);
1128 if (ret) {
1129 dev_err(&pdev->dev, "Can't get dma-channels.\n");
1130 return ret;
1131 }
1132
1133 ret = of_property_read_u32(np, "block-offset", &blk_off);
1134 if (ret) {
1135 dev_err(&pdev->dev, "Can't get block-offset.\n");
1136 return ret;
1137 }
1138
1139 ret = of_property_read_u32(np, "block-number", &blk_num);
1140 if (ret) {
1141 dev_err(&pdev->dev, "Can't get block-number.\n");
1142 return ret;
1143 }
1144
1145 blk_num = min_t(int, blk_num, num_online_cpus());
1146
1147 len = sizeof(*fsl_qdma);
1148 fsl_qdma = devm_kzalloc(&pdev->dev, len, GFP_KERNEL);
1149 if (!fsl_qdma)
1150 return -ENOMEM;
1151
1152 len = sizeof(*fsl_chan) * chans;
1153 fsl_qdma->chans = devm_kzalloc(&pdev->dev, len, GFP_KERNEL);
1154 if (!fsl_qdma->chans)
1155 return -ENOMEM;
1156
1157 len = sizeof(struct fsl_qdma_queue *) * blk_num;
1158 fsl_qdma->status = devm_kzalloc(&pdev->dev, len, GFP_KERNEL);
1159 if (!fsl_qdma->status)
1160 return -ENOMEM;
1161
1162 len = sizeof(int) * blk_num;
1163 fsl_qdma->queue_irq = devm_kzalloc(&pdev->dev, len, GFP_KERNEL);
1164 if (!fsl_qdma->queue_irq)
1165 return -ENOMEM;
1166
1167 ret = of_property_read_u32(np, "fsl,dma-queues", &queues);
1168 if (ret) {
1169 dev_err(&pdev->dev, "Can't get queues.\n");
1170 return ret;
1171 }
1172
1173 fsl_qdma->desc_allocated = 0;
1174 fsl_qdma->n_chans = chans;
1175 fsl_qdma->n_queues = queues;
1176 fsl_qdma->block_number = blk_num;
1177 fsl_qdma->block_offset = blk_off;
1178
1179 mutex_init(&fsl_qdma->fsl_qdma_mutex);
1180
1181 for (i = 0; i < fsl_qdma->block_number; i++) {
1182 fsl_qdma->status[i] = fsl_qdma_prep_status_queue(pdev);
1183 if (!fsl_qdma->status[i])
1184 return -ENOMEM;
1185 }
1186 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1187 fsl_qdma->ctrl_base = devm_ioremap_resource(&pdev->dev, res);
1188 if (IS_ERR(fsl_qdma->ctrl_base))
1189 return PTR_ERR(fsl_qdma->ctrl_base);
1190
1191 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1192 fsl_qdma->status_base = devm_ioremap_resource(&pdev->dev, res);
1193 if (IS_ERR(fsl_qdma->status_base))
1194 return PTR_ERR(fsl_qdma->status_base);
1195
1196 res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
1197 fsl_qdma->block_base = devm_ioremap_resource(&pdev->dev, res);
1198 if (IS_ERR(fsl_qdma->block_base))
1199 return PTR_ERR(fsl_qdma->block_base);
1200 fsl_qdma->queue = fsl_qdma_alloc_queue_resources(pdev, fsl_qdma);
1201 if (!fsl_qdma->queue)
1202 return -ENOMEM;
1203
1204 ret = fsl_qdma_irq_init(pdev, fsl_qdma);
1205 if (ret)
1206 return ret;
1207
1208 fsl_qdma->irq_base = platform_get_irq_byname(pdev, "qdma-queue0");
1209 if (fsl_qdma->irq_base < 0)
1210 return fsl_qdma->irq_base;
1211
1212 fsl_qdma->feature = of_property_read_bool(np, "big-endian");
1213 INIT_LIST_HEAD(&fsl_qdma->dma_dev.channels);
1214
1215 for (i = 0; i < fsl_qdma->n_chans; i++) {
1216 struct fsl_qdma_chan *fsl_chan = &fsl_qdma->chans[i];
1217
1218 fsl_chan->qdma = fsl_qdma;
1219 fsl_chan->queue = fsl_qdma->queue + i % (fsl_qdma->n_queues *
1220 fsl_qdma->block_number);
1221 fsl_chan->vchan.desc_free = fsl_qdma_free_desc;
1222 vchan_init(&fsl_chan->vchan, &fsl_qdma->dma_dev);
1223 }
1224
1225 dma_cap_set(DMA_MEMCPY, fsl_qdma->dma_dev.cap_mask);
1226
1227 fsl_qdma->dma_dev.dev = &pdev->dev;
1228 fsl_qdma->dma_dev.device_free_chan_resources =
1229 fsl_qdma_free_chan_resources;
1230 fsl_qdma->dma_dev.device_alloc_chan_resources =
1231 fsl_qdma_alloc_chan_resources;
1232 fsl_qdma->dma_dev.device_tx_status = dma_cookie_status;
1233 fsl_qdma->dma_dev.device_prep_dma_memcpy = fsl_qdma_prep_memcpy;
1234 fsl_qdma->dma_dev.device_issue_pending = fsl_qdma_issue_pending;
1235 fsl_qdma->dma_dev.device_synchronize = fsl_qdma_synchronize;
1236 fsl_qdma->dma_dev.device_terminate_all = fsl_qdma_terminate_all;
1237
> 1238 ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(40))
1239 if (ret) {
1240 dev_err(&pdev->dev, "dma_set_mask failure.\n");
1241 return ret;
1242 }
1243
1244 platform_set_drvdata(pdev, fsl_qdma);
1245
1246 ret = dma_async_device_register(&fsl_qdma->dma_dev);
1247 if (ret) {
1248 dev_err(&pdev->dev,
1249 "Can't register NXP Layerscape qDMA engine.\n");
1250 return ret;
1251 }
1252
1253 ret = fsl_qdma_reg_init(fsl_qdma);
1254 if (ret) {
1255 dev_err(&pdev->dev, "Can't Initialize the qDMA engine.\n");
1256 return ret;
1257 }
1258
1259 return 0;
1260 }
1261

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx

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Next message: Jeff Layton: "Re: [PATCH v6 01/30] iov_iter: Add ITER_XARRAY"
Previous message: Kalle Valo: "Re: [PATCH] brcmfmac: Avoid GFP_ATOMIC when GFP_KERNEL is enough"
In reply to: Robin Gong: "[PATCH v1] dmaengine: fsl-qdma: check dma_set_mask return value"
Next in thread: kernel test robot: "Re: [PATCH v1] dmaengine: fsl-qdma: check dma_set_mask return value"
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