Re: [PATCH] perf vendor events: Add missing model numbers

[Andi Kleen]

On Fri, Apr 23, 2021 at 10:58:02AM +0800, Jin, Yao wrote:
> Hi Andi, Arnaldo, Jiri,
> 
> Can this patch be accepted?

Looks good to me.

Reviewed-by: Andi Kleen <ak@xxxxxxxxxxxxxxx>


> 
> Thanks
> Jin Yao
> 
> On 3/29/2021 3:09 PM, Jin Yao wrote:
> > Kernel has supported COMETLAKE/COMETLAKE_L to use the SKYLAKE
> > events and supported TIGERLAKE_L/TIGERLAKE/ROCKETLAKE to use
> > the ICELAKE events. But pmu-events mapfile.csv is missing
> > these model numbers.
> > 
> > Now add the missing model numbers to mapfile.csv.
> > 
> > Signed-off-by: Jin Yao <yao.jin@xxxxxxxxxxxxxxx>
> > ---
> >   tools/perf/pmu-events/arch/x86/mapfile.csv | 3 +++
> >   1 file changed, 3 insertions(+)
> > 
> > diff --git a/tools/perf/pmu-events/arch/x86/mapfile.csv b/tools/perf/pmu-events/arch/x86/mapfile.csv
> > index 2f2a209e87e1..6455f06f35d3 100644
> > --- a/tools/perf/pmu-events/arch/x86/mapfile.csv
> > +++ b/tools/perf/pmu-events/arch/x86/mapfile.csv
> > @@ -24,6 +24,7 @@ GenuineIntel-6-1F,v2,nehalemep,core
> >   GenuineIntel-6-1A,v2,nehalemep,core
> >   GenuineIntel-6-2E,v2,nehalemex,core
> >   GenuineIntel-6-[4589]E,v24,skylake,core
> > +GenuineIntel-6-A[56],v24,skylake,core
> >   GenuineIntel-6-37,v13,silvermont,core
> >   GenuineIntel-6-4D,v13,silvermont,core
> >   GenuineIntel-6-4C,v13,silvermont,core
> > @@ -35,6 +36,8 @@ GenuineIntel-6-55-[01234],v1,skylakex,core
> >   GenuineIntel-6-55-[56789ABCDEF],v1,cascadelakex,core
> >   GenuineIntel-6-7D,v1,icelake,core
> >   GenuineIntel-6-7E,v1,icelake,core
> > +GenuineIntel-6-8[CD],v1,icelake,core
> > +GenuineIntel-6-A7,v1,icelake,core
> >   GenuineIntel-6-86,v1,tremontx,core
> >   AuthenticAMD-23-([12][0-9A-F]|[0-9A-F]),v2,amdzen1,core
> >   AuthenticAMD-23-[[:xdigit:]]+,v1,amdzen2,core
> >