[PATCH 0/3] perf/x86/intel/uncore: Enable I/O stacks to IIO PMON mapping on SNR and ICX

[alexander . antonov]

From: Alexander Antonov <alexander.antonov@xxxxxxxxxxxxxxx>

Currently I/O stacks to IIO PMON mapping is available on Skylake servers only
and it is exposed through attributes /sys/devices/uncore_iio_<pmu_idx>/dieX,
where dieX is a file which holds "Segment:Root Bus" for PCIe root port which
can be monitored by that IIO PMON block.

The example for 2-S Skylake server:

# tail /sys/devices/uncore_iio_*/die*
==> /sys/devices/uncore_iio_0/die0 <==
0000:00
==> /sys/devices/uncore_iio_0/die1 <==
0000:80
==> /sys/devices/uncore_iio_1/die0 <==
0000:17
==> /sys/devices/uncore_iio_1/die1 <==
0000:85
==> /sys/devices/uncore_iio_2/die0 <==
0000:3a
==> /sys/devices/uncore_iio_2/die1 <==
0000:ae
==> /sys/devices/uncore_iio_3/die0 <==
0000:5d
==> /sys/devices/uncore_iio_3/die1 <==
0000:d7

Mapping algorithm for Skylake server is based on topology information
from CPU_BUS_NO MSR but this approach is not applicable for Snowridge and
Icelake server.
In case of these platforms mapping can be enabled by reading SAD_CONTROL_CFG
CSR from Mesh2IIO device with 0x09a2 DID. This CSR contains stack IDs in its
own notation and these IDs are statically mapped on IDs in PMON notation.

This patchset enables I/O stacks to IIO PMON mapping for Snowridge and Icelake
server.

Alexander Antonov (3):
  perf/x86/intel/uncore: Generalize I/O stacks to PMON mapping procedure
  perf/x86/intel/uncore: Enable I/O stacks to IIO PMON mapping on SNR
  perf/x86/intel/uncore: Enable I/O stacks to IIO PMON mapping on ICX

 arch/x86/events/intel/uncore.h       |   1 +
 arch/x86/events/intel/uncore_snbep.c | 173 ++++++++++++++++++++++++++-
 2 files changed, 168 insertions(+), 6 deletions(-)


base-commit: cface0326a6c2ae5c8f47bd466f07624b3e348a7
-- 
2.21.3